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Loop Vectorization: How to vectorize interleave memory access? Hao - PowerPoint PPT Presentation

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Loop Vectorization: How to vectorize interleave memory access? Hao Liu, James Molloy and Jiangning Liu 14th April 2015 1 Background: Interleave Access Case: visit 24-bit RGB image Memory: B3 G3 R3 B0 G2 R2 B0 G1 R1 B0 G0 R0

  1. Loop Vectorization: How to vectorize interleave memory access? Hao Liu, James Molloy and Jiangning Liu 14th April 2015 1

  2. Background: Interleave Access • Case: visit 24-bit RGB image Memory: … B3 G3 R3 B0 G2 R2 B0 G1 R1 B0 G0 R0 for (i = 0; i < N; i += 3) { for.body: R = RGB[i]; ... G = RGB[i+1]; %R = load i8, i8* %idx0 B = RGB[i+2]; %G = load i8, i8* %idx1 R += C; %B = load i8, i8* %idx2 G -= C; %add = add i8 %R, %C B *= C; %sub = sub i8 %G, %C RGB[i] = R; %mul = mul i8 %B, %C RGB[i + 1] = G; store i8 %add, i8* %idx0 RGB[i + 2] = B; store i8 %sub, i8* %idx1 } store i8 %mul, i8* %idx2 ... 2

  3. Background: Interleave Access … B3 G3 R3 B0 G2 R2 B0 G1 R1 B0 G0 R0 Memory: Interleave Load (LD3) % wide.B: B7 B6 B5 B4 B3 B2 B1 B0 G7 G6 G5 G4 G3 G2 G1 G0 % wide.G: R7 R6 R5 R4 R3 R2 R1 R0 + - * % wide.R: C C C C C C C C C C C C C C C C % wide.C: C C C C C C C C = % mul.B: B7 B6 B5 B4 B3 B2 B1 B0 G7 G6 G5 G4 G3 G2 G1 G0 % sub.G: R7 R6 R5 R4 R3 R2 R1 R0 % add.R: Interleave Store (ST3) … B3 G3 R3 B0 G2 R2 B0 G1 R1 B0 G0 R0 Memory: 3

  4. Loop Vectorizer Overview • 3 phases: Legality Inductions – Legality Reductions Memory – Profitability – Transform Profitability CostModel Transform Scalar ->Vector Unroll 4

  5. Teach Loop Vectorizer: Legality • Identification – Collect: Constant strided accesses – Sort: Consecutive accesses the same stride – Select: Number of accesses equal to the stride Step1: StrideList = {<%R, 3>, <%G, 3>, <%B, 3>, ...} Step2: ConsecutiveList = {%R, %G, %B, ...} Step3: InterleaveList = {%R, %G, %B} 5

  6. Teach Loop Vectorizer: Legality • Induction with arbitrary steps (Patch upstreamed) for (unsigned i = 0; i < N; i += 3 ) { ... • Memory check for (i = 0; i < N; i += ?) { R = RGB[i]; True Dependence: G = RGB[i+1]; i+=1, i+=2 B = RGB[i+2]; ... No Dependence: RGB[i] = R; i+=3 RGB[i + 1] = G; RGB[i + 2] = B; } 6

  7. Teach Loop Vectorizer: Transform • IRs to intrinsics %R = load i8, i8* %ptr0 %G = load i8, i8* %ptr1 %B = load i8, i8* %ptr2 Loop Vectorizer <8 x i8> stride.load(%ptr0, 0, 3) <24 x i8> index.load (%ptr0, <0,3,6,…,1,... <8 x i8> stride.load(%ptr0, 1, 3) <8 x i8> shuffle <0,1,2,3,4,5,6,7> <8 x i8> stride.load(%ptr0, 2, 3) <8 x i8> shuffle <8,9,10,11,12,13,14,15> <8 x i8> shuffle <16,17,18,19,20,21,22,23> Back End call {<8xi8>, <8xi8>, <8xi8>} llvm.aarch64.ld3(%ptr) 7

  8. Expect Performance Gain • Expected improvements in specific benchmarks – EEMBC.rgbcmy 6x – EEMBC.rgbyiq 3x • Need more testing and tuning • More Challenges – Runtime memory dependence checks – Type promotion: i8 is illegal but <8 x i8> is legal 8

  9. Thank you! 9

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