Leveraging Parallelware in MAESTRO and EPEEC Contributions by - - PowerPoint PPT Presentation

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Leveraging Parallelware in MAESTRO and EPEEC Contributions by - - PowerPoint PPT Presentation

Leveraging Parallelware in MAESTRO and EPEEC Contributions by Appentra and Enhancements to Parallelware Manuel Arenaz manuel.arenaz@appentra.com PRACE booth #2033 Thursday, 15 November 2018 | Dallas, US http://www.prace-ri.eu/praceatsc18/


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Leveraging Parallelware in MAESTRO and EPEEC

Contributions by Appentra and Enhancements to Parallelware

Manuel Arenaz manuel.arenaz@appentra.com

PRACE booth #2033 Thursday, 15 November 2018 | Dallas, US http://www.prace-ri.eu/praceatsc18/

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SLIDE 2

Index

  • European Research: H2020 FETHPC programme

○ Projects MAESTRO and EPEEC

  • Parallelware Software before MAESTRO & EPEEC

○ Benefits and known limitations

  • MAESTRO: Middleware for memory and data-awareness in workflows

○ Contributions by Appentra

  • EPEEC: European joint Effort toward a Highly Productive Programming

Environment for Heterogeneous Exascale Computing

○ Contributions by Appentra

  • Enhancements to Parallelware Software due to Maestro & EPEEC
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SLIDE 3

Index

  • European Research: H2020 FETHPC programme

○ Projects MAESTRO and EPEEC

  • Parallelware Software before MAESTRO & EPEEC

○ Benefits and known limitations

  • MAESTRO: Middleware for memory and data-awareness in workflows

○ Contributions by Appentra

  • EPEEC: European joint Effort toward a Highly Productive Programming

Environment for Heterogeneous Exascale Computing

○ Contributions by Appentra

  • Enhancements to Parallelware Software due to Maestro & EPEEC
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SLIDE 4

European Research: H2020 FETHPC Programme

How can Parallelware tools help to address these R&D challenges?

Subtopic b) Exascale system software and management, to advance the state of the art in system software and management for node architectures. Subtopic a) High productivity programming environments for exascale, to simplify application software development for large- and extreme-scale systems.

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SLIDE 5

Index

  • European Research: H2020 FETHPC programme

○ Projects MAESTRO and EPEEC

  • Parallelware Software before MAESTRO & EPEEC

○ Benefits and known limitations

  • MAESTRO: Middleware for memory and data-awareness in workflows

○ Contributions by Appentra

  • EPEEC: European joint Effort toward a Highly Productive Programming

Environment for Heterogeneous Exascale Computing

○ Contributions by Appentra

  • Enhancements to Parallelware Software due to Maestro & EPEEC
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SLIDE 6

GUI Desktop

Emerging Technology

Parallelware Software before MAESTRO & EPEEC

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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SLIDE 7

GUI Desktop

Emerging Technology

Parallelware Software: Benefits

  • Good training tool for parallel programming, particularly for GPUs.
  • Support for multithreading and offloading in OpenMP 4.5.
  • Support for offloading in OpenACC.
  • Good user messages explaining why and how a loop can be parallelized.
  • Management of data scoping of variables (eg. private, shared, reduction)
  • Good code examples for training.
  • Multi-platform: Linux, Windows, MacOSX

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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SLIDE 8

GUI Desktop

Emerging Technology

Parallelware Software: Known Limitations

  • Needs enhancements to analyze “real” applications (eg. MPI+X).
  • Lack of support for structs in C.
  • Lack of support for C++ and Fortran.
  • Lack of support for tasking and SIMD.
  • Lack of support for multiple files and procedure calls.
  • More precise support for data-scoping.

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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SLIDE 9

Index

  • European Research: H2020 FETHPC programme

○ Projects MAESTRO and EPEEC

  • Parallelware Software before MAESTRO & EPEEC

○ Benefits and known limitations

  • MAESTRO: Middleware for memory and data-awareness in workflows

○ Contributions by Appentra

  • EPEEC: European joint Effort toward a Highly Productive Programming

Environment for Heterogeneous Exascale Computing

○ Contributions by Appentra

  • Enhancements to Parallelware Software due to Maestro & EPEEC
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Forschungszentrum Julich Gmbh (Juelich, Germany) - Coordinator Commissariat à l'Énergie atomique et aux Énergies alternatives (CEA, France) Appentra Solutions SL (Appentra, Spain) Eidgenoessische Technische Hochschule Zuerich (ETH Zürich, Switzerland) European Centre for Medium-range Weather Forecasts (ECMWF, United Kingdom) Seagate Systems UK Limited (Seagate Systems, United Kingdom) Cray Computer Gmbh (Cray, Switzerland)

Objective:

  • Build a data-aware and memory-aware middleware framework that addresses ubiquitous problems of data movement in complex

memory hierarchies and at many levels of the HPC software stack.

Partners:

Middleware for memory and data-awareness in workflows

www.maestro-data.eu

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Middleware for memory and data-awareness in workflows

  • The Maestro project has been set up to tackle one of the most important and difficult problems in HPC,

namely the orchestration of data across multiple levels of the memory and storage hardware as well as the software stack. Although data movement is now recognized as the primary obstacle to performance efficiency, much of the software stack is not well suited to optimizing data movement, and was instead designed in an age where optimizing arithmetic operations was the priority.

  • The Maestro project aims to capture the data- and memory-aware aspects of applications and the

software stack into a new middleware layer which will perform basic data movement and optimisation

  • n behalf of the application, also making use of modern memory systems.

“The Maestro project will provide a unique opportunity to challenge traditional approaches for handling data objects and data movements in complex HPC applications and workflows, which will be key for efficient exploitation of future exascale level supercomputers.”

  • Prof. Dirk Pleiter, Coordinator of the Maestro project.

www.maestro-data.eu

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Contributions by Appentra

  • Appentra will enhance the Parallelware software for data awareness to support the Maestro

middleware.

  • Appentra brings to the project its long experience in tools for static analysis of HPC codes, which will be

used to analyze the application and workflow requirements of the Maestro middleware, and to co-design the Maestro middleware.

  • Appentra brings to the project its long experience in tools for static analysis of HPC codes, which will be

used to develop new components of the Maestro middleware concerned with data access and dataflow as well as data-aware execution and orchestration.

  • Appentra will contribute to the validation and demonstration of the Maestro middleware.
  • Appentra leads the coordination of the dissemination activities in Maestro.

www.maestro-data.eu

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GUI Desktop

Emerging Technology

Contributions by Appentra

www.maestro-data.eu

The Parallelware middle-end will be enhanced by adding the new source code static analysis capabilities needed by the Maestro data orchestration middleware.

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end

Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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GUI Desktop

Emerging Technology

Contributions by Appentra

www.maestro-data.eu

1. Preparation of the Parallelware software to expose the information available in the middle-end:

○ Hidden in Parallelware Trainer as the amount of information would be overwhelming.

2. Two new ways to expose the information of Parallelware middle-end:

○ Parallelware Analyzer, new command-line tool. ○ Extension to libpw, new API for third-party tools to access to Parallelware capabilities.

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end

Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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SLIDE 15

GUI Desktop

Emerging Technology

Contributions by Appentra

www.maestro-data.eu

Command Line Tool

  • n going

Emerging Technology

3. First release of Parallelware Analyzer version BETA.

a. Proposed first set of analyses: --datascoping, --functions,

  • -datalayout, --code and --overview

b. Enhancements to the Parallelware middle-end under development:

i. Tracking of scalars across multiple files and multiple procedures ii. Tracking of fields of structs

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end

Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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SLIDE 16

Index

  • European Research: H2020 FETHPC programme

○ Projects MAESTRO and EPEEC

  • Parallelware Software before MAESTRO & EPEEC

○ Benefits and known limitations

  • MAESTRO: Middleware for memory and data-awareness in workflows

○ Contributions by Appentra

  • EPEEC: European joint Effort toward a Highly Productive Programming

Environment for Heterogeneous Exascale Computing

○ Contributions by Appentra

  • Enhancements to Parallelware Software due to Maestro & EPEEC
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SLIDE 17

Barcelona Supercomputing Center - Centro Nacional de Supercomputacion (BSC, Spain) - Coordinator Fraunhofer Gesellschaft Zur Foerderung der Angewandten Forschung E.V. (Fraunhofer, Germany) Inesc ID - Instituto de Engenharia de Sistemas e Computadores, Investigação e Desenvolvimento em Lisboa (Inesc ID, Portugal) Institut National de Recherche en Informatique et Automatique (Inria, France) Appentra Solutions SL (Appentra, Spain) Cineca Consorzio Interuniversitario (Cineca, Italy) Eta Scale Ab (Eta Scale, Sweden) Centre Europeen de Recherche et de Formation Avancée en Calcul Scientifique (Cerfacs, France) Interuniversitair Micro-electronica Centrum (Imec, Belgium) Uppsala Universitet (Uu, Sweden)

European joint Effort toward a Highly Productive Programming Environment for Heterogeneous Exascale Computing

Objective:

  • Develop and deploy a production-ready parallel programming environment that turns upcoming overwhelmingly-heterogeneous

exascale supercomputers into manageable platforms for domain application developers.

Partners:

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SLIDE 18
  • The consortium will significantly advance and integrate existing state-of-the-art components based on

European technology (programming models, runtime systems, and tools) with key features enabling 3

  • verarching objectives: high coding productivity, high performance, and energy awareness.
  • An automatic generator of compiler directives will provide outstanding coding productivity from the very

beginning of the application developing/porting process. Developers will be able to leverage either shared memory or distributed-shared memory programming flavours, and code in their preferred language: C, Fortran,

  • r C++.
  • EPEEC will ensure the composability and interoperability of its programming models and runtimes, which will

incorporate specific features to handle data-intensive and extreme-data applications.

  • Enhanced leading-edge performance tools will offer integral profiling, performance prediction, and

visualisation of traces.

  • Five applications representative of different relevant scientific domains will serve as part of a strong

inter-disciplinary co-design approach and as technology demonstrators. EPEEC exploits results from past FET projects that led to the cutting-edge software components it builds upon, and pursues influencing the most relevant parallel programming standardisation bodies.

European joint Effort toward a Highly Productive Programming Environment for Heterogeneous Exascale Computing

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SLIDE 19

19

Contributions by Appentra

The Parallelware front-end and back-end will be enhanced in order to meet the needs

  • f the EPEEC highly productive

programming environment for heterogeneous exascale computing.

GUI Desktop

Emerging Technology

Command Line Tool

  • n going

Emerging Technology

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end

Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5

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20

Contributions by Appentra

GUI Desktop

Emerging Technology

Command Line Tool

  • n going

Emerging Technology

1. Currently conducting studies to understand the requirements

  • f the EPEEC applications, EPEEC programming models and

EPEEC target hardware platforms.

a. Programming languages: C++ (ie. C enriched with vector, algorithm and templates), Fortran b. Programming models: OmpSs, OpenMP (tasking) c. Hardware platforms: GPUs, FPGAs

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end

Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5 C++ Fortran Tasking OmpSs FPGAs

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Index

  • European Research: H2020 FETHPC programme

○ Projects MAESTRO and EPEEC

  • Parallelware Software before MAESTRO & EPEEC

○ Benefits and known limitations

  • MAESTRO: Middleware for memory and data-awareness in workflows

○ Contributions by Appentra

  • EPEEC: European joint Effort toward a Highly Productive Programming

Environment for Heterogeneous Exascale Computing

○ Contributions by Appentra

  • Enhancements to Parallelware Software due to Maestro & EPEEC
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Enhancements to Parallelware Software

GUI Desktop

Emerging Technology

Command Line Tool

  • n going

Emerging Technology

The projects MAESTRO and EPEEC have just started, so these capabilities will be developed incrementally following a co-design approach guided by (pre-)exascale applications.

Parallelware Technology (libpw)

Parallelware front-end Parallelware back-end

Parallelware middle-end

Semantic Analysis Engine C OpenACC 2.0 Multi-Threading Offloading OpenMP 4.5 C++ Fortran Tasking OmpSs FPGAs

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SLIDE 23

Leveraging Parallelware in MAESTRO and EPEEC

Contributions by Appentra and Enhancements to Parallelware

Manuel Arenaz manuel.arenaz@appentra.com

PRACE booth #2033 Thursday, 15 November 2018 | Dallas, US