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IP vs. Chiplets SOC Disintegration Trend at Deep FinFET Submicron - - PowerPoint PPT Presentation
IP vs. Chiplets SOC Disintegration Trend at Deep FinFET Submicron - - PowerPoint PPT Presentation
IP vs. Chiplets SOC Disintegration Trend at Deep FinFET Submicron Weijin Dai Executive Vice President, Chief Strategy Officer, IP Division General Manager September 2018 SOC Disintegration at Deep FinFET Submicron - Chiplets SOC to Chiplet
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SOC to Chiplet – The Economics
▲Higher cost per gate below 28 nm HKMG bulk
Source: IBS
22FDX
28FDS
12FDX 16FF 10FF 7FF
28HKMG
▲Advantages of ”SOC” composed by chiplets
►Components reuse, enable multiple variations ►Mixed process technology ►Simplify “SOC” design, faster time to market ►Reduce “SOC” Cost
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Industry Leaders Building Chiplet Enabling Technology
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Back To The Future!
Specific Function Chips SOC Chiplets – Virtual SOC
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VeriSilicon IP Portfolio
Server Class Tablets Smartphone
Neural Network AI GPU Video
Automotive
Audio/Voice DISPLAY ISP Compression/ Encryption
& Wearables & IoT
Compute
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VeriSilicon Technology in Edge Device, Edge Server and Cloud
Cloud,
Data Center
Video Transcoding Pixel Compression High Performance Computing Surveillance Smart Home, Vision, Voice AR/VR Wearables
I n s t r u m e n t C l u s t e r
In f
- t
a i n m e nt nt
T e l e m a t i c s V 2 X C a m e r a s D r i v e r a n d P a s s e n g e r M
- b
i l e D e v i c e s A D A S , B
- d
y a n d P
- w
e r t r a i n E C U s CL CL OU OU D A u d i
- A
m p l i f i e r R e a r S e a t E n t e r t a i n m e n t
Automotive
Edge Server Edge Server
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Lego of Chiplets
DDR Controller
AXI4
Clock and ResetControl
AHB Gen3x4 APB
PCIe PHY
D M A
DDR PHY
PL Ls
64b 64b 32b master slave
PCI XBAR (AHB/APB/AXI) PCIe Controller
32b
System Controll er
32b 32b clock 2x32b
DDR Controller DDR PHY
64b
Processor
64b 32b 32b 64b
Video Vision/AI Compute GPU
Processor Chiplets
GPU GPU ISP Vision/AI Video
Mix Chiplets in a solution Scale up performance with Chiplets
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Subsystem IP – Pixel Compression & Encryption
Host Block
Nonsec Secure Nonsecure Registers Bypass Secure Registers
Register Access Masters DDR Access Slaves
DEC800 Line Buffer FIFO Compression Pipe Compression Pipe IED Pipe MUX Bypass MMU
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Subsystem IP - AI Deep Integration
ISP8000 VIPNano AI VISION/AI VIP8000 Video Encoder VC8000 Voice ZSP VIPPico AI AI GPU/Compute GC8000VX + VIP8000 Intelligent Surveillance Camera Solution Compute/AR/VR Solution Smart Sensors cell phone, car back camera Smart Home, talking device
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AI is Everywhere, AI Needs to be Build into Subsystem IP
▲Natural User Interface
► AI VISION ► AI VIOCE ► AI Sensors
▲Multi-Media
►Graphics, Video, Audio, Voice
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The Trend and The Need
IP Subsystem IP SOC
chiplet
Virtual SOC
The Trend The Need
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