Introduction to Digital Control Angelo Cenedese Dipartimento di - - PowerPoint PPT Presentation

Introduction to Digital Control

Angelo Cenedese

Dipartimento di Tecnica e Gestione dei Sistemi Industriali Università di Padova angelo.cenedese@unipd.it A.Y. 2008-2009

Introduction

Direct Digital Control (DDC) Feedback control system where the controller action is attained numerically by a y y y programmable digital device disturbances Control Algorithm

• utput

Actuator Process reference

• utput

g I/O input Transducer Microprocessor (μp) The overall system is an hybrid system or a sampled data system: digital part (discrete

A.Cenedese Introduction to Digital Control

The overall system is an hybrid system or a sampled data system: digital part (discrete time: controller)+ analogic part (continuous time: process, actuator, tranducer)

1

Direct Digital Control

disturbances Control Algorithm

• utput

Actuator Process reference

• utput

g I/O input Transducer Microprocessor (μp)

A.Cenedese Introduction to Digital Control 2

Control Algorithm

Clock Reference Feedback i l Elaboration Output to W it interrupt reading signal acquisition (control algorithm) p actuator Wait

The interrupt is provided by a Real Time Clock RTC.

Microprocessor (μp)

The interrupt is provided by a Real Time Clock RTC. The reference is already available in digital format or is computed in real time or is an analogical signal acquired by the transducer Control at discrete times regularly spaced every T (sampling time) given by the RTC The control algo output signal is piecewise constant Th t ll t i th “di it d i ” ( k ith b ) hil i t i l The controller acts in the “digit domain” (works with numbers) while input signals to the plant (actuator commands) and output signals from the transducer (measurements) are usually analog signals.

• h

h f d f bl b h d l d h l

A.Cenedese Introduction to Digital Control

There is therefore need for a suitable interface between the digital and the analog parts of the system.

3

Direct Digital Control

disturbances Control Algorithm

• utput

Actuator Process reference

• utput

g I/O input Transducer Microprocessor (μp)

A.Cenedese Introduction to Digital Control 4

Input interface (to the controller) – 1

ADC - A/D Analog to Digital Converter:

VFS

It provides the sampling of the analog signal from the transducer and the conversion into a sequence of bits

ADC bit V

Uniform quantization Nonuniform quantization Uniform quantization Nonuniform quantization

A.Cenedese Introduction to Digital Control 5

Input interface (to the controller) – 2

Gi Uniform quantization: Given: Number of bits n ( number of levels) Full scale value FS ( maximum value managed by the device) Analog signal V Quantization step (quantum) q:

n

2 FS q =

Quantization (nonlinear operation):

q 1 n V q 1 n if nq Q[V] V ⎟ ⎞ ⎜ ⎛ + < < ⎟ ⎞ ⎜ ⎛ = →

ADC Mathematical model:

q 2 n V q 2

• n

if nq Q[V] V ⎟ ⎠ ⎜ ⎝ + < < ⎟ ⎠ ⎜ ⎝ = →

ADC Mathematical model: Q n bits V

A.Cenedese Introduction to Digital Control

T

6

Output interface (from the controller)

DAC - D/A Digital to Analog Converter: It converts a binary digit into the analog signal

VFS

It converts a binary digit into the analog signal commanding the actuator (voltage or current, proportional in value to the input signal value).

DAC V bit VFS bit

The converter also interpolates the signal: ZOH - Zero Order Hold o holder

• utput

t input

Note: the output interface problem is of immediate solution when the actuator is a digital actuator, that is a system that “accepts number as its own inputs” (e.g. step motor: the

A.Cenedese Introduction to Digital Control

input is the number of rotation steps to advance – and not the rotation angle…)

7

Direct Digital Control scheme

DDC scheme is therefore:

Rif.

• ControlAlgo

H0 Actuator Process T Transducer Q

Note: reference is a digital signal (already acquired/in memory) DDC raises two main issues related to sampling and quantization: 1. Error correction happens only at discrete times ( sampling) 2. Nonlinearities are present in the system ( quantization)

A.Cenedese Introduction to Digital Control 8

Example: Control System Design

1.4 CONT DISC

• Control

Algo Actuator Process Transducer Rif.

0.8 1 1.2 ut DISC 0.4 0.6

• utpu

Rif.

• Control

Algo H0 Actuator Process Transducer

0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 0.2 time

T Transducer Q

A.Cenedese Introduction to Digital Control 9

Sampling effects – 1

The discrete time signal obtained by sampling a continuous time signal shows a spectrum that is periodic with sample period related to the sampling frequency: Ω=2π/T Example:

t) sen( U u(t) ω =

ω0

• ω0

Ω/2

• Ω/2

⎟ ⎠ ⎞ ⎜ ⎝ ⎛ Ω = 2 sen U u(T) πω

Ω Ω 2Ω 2Ω 2Ω-ω0 ω ω

• (Ω-ω0)

Ω-ω0 Ω+ω0

• (2Ω-ω0)
• (Ω+ω0)

⎠ ⎝ Ω

Ω

• Ω

2Ω

• 2Ω

ω0

• ω0

2 Ω > ω

In this case (Nyquist frequency)…

2 ω ω < − Ω

There appears “new” components at low frequency

A.Cenedese Introduction to Digital Control 10

Aliasing o Frequency Folding

Sampling effects – 2

If the feedback signal contains spectral components at a frequency higher than the Nyquist frequency, these are replicated at lower frequency within the passband of the yq f q y p f q y p f closed system and are seen by the controller as disturbances to be compensated. To avoid the phenomenon, the Nyquist frequency should be significantly higher To avoid the phenomenon, the Nyquist frequency should be significantly higher then the closed system passband.

A.Cenedese Introduction to Digital Control 11

Sampling effects – 3

In addition, a random high-frequency noise is often superimposed to the feedback g f q y f p p f signal: electronic noise from the transducer electronics or from the link controller/transducer + electromagnetic disturbances. Anti-aliasing filter:

L(s)

• R(z)

D(z) H0 G(s) Y(s) ( ) N(s) U(s) Anti-aliasing filter filter

A.Cenedese Introduction to Digital Control 12

Quantization – 1

In a DDC system quantization’s are present other than that introduced by the ADC: the digital CPU resorts to finite length digital words (8-16-32-64 bits) and to a g f g g ( ) suitable mathematics (fixed point vs floating point). 1. Coefficient quantization: Th (li ) l l i li d l i li i h “ h ” The (linear) control algo implies sums and multiplications that are “chosen” when the control law is designed (controller synthesis). Coefficients are discretized into finite length word starting from their continuous value counterpart. 2. Multiplication quantization: M l l b b b 2 b b h h b Multiplication between two n-bit numbers is a 2n-bit number that has to be represented according to the chosen n-bit format. Truncation or rounding are used to obtain this result. 3. Output quantization: Often the output of the control algorithm has a number of bits higher than the

A.Cenedese Introduction to Digital Control 13

Often the output of the control algorithm has a number of bits higher than the system representation, requiring the so called “output quantization”

Quantization – 2

To synthesize a controller, we firstly neglect quantizations that are conversely taken into account through numerical simulations or experimental validations. g p

• C(z)

H0 G(s)

G(s) is the process transfer function (linear analog process)

• G(s) is the process transfer function (linear analog process)

C(z) is the controller algorithm (discrete and usually linear) Th t li d i h i d th f th f ll i h b The two sampling devices are synchronized, therefore the following scheme can be adopted: sampled error scheme

• C(z)

H0 G(s)

A.Cenedese Introduction to Digital Control 14

Discrete Linear Time Invariant (DLTI) systems

Discrete system: Input and output signals are discrete time signals

Controllore Digitale P R O C E S S O H

Digital controller Process

T

DLTI t

sistema discreto

DLTI DLTI system:

discreto u(k) y(k)

DLTI It can be described by a N-order linear difference equation:

∑ ∑

= =

− + − =

M j j N i i

j k u b i k y a k y

1

) ( ) ( ) (

A.Cenedese Introduction to Digital Control 15

“initial conditions” N output values + M input values + current u(k)

Impulse Response

Discrete impulse δ(k) impulse response h(k)

δ(k) h(k) Sistema

Any signal u(k) can be written as a sum of many discrete impulses

δ(k) h(k) 0 1 k Sistema discreto

DLTI

Any signal u(k) can be written as a sum of many discrete impulses

∑

∞ ∞ −

− = ) ( ) ( ) ( i k i u k u

i

δ

∞ k

system causality

As for the output:

∑

∞ ∞ −

− = ) ( ) ( ) ( i k h i u k y

i

∑

∞ −

− =

k i

i k h i u k y ) ( ) ( ) (

system causality

∑ ∑

− = − =

k j k i

j k u j h i k h i u k y ) ( ) ( ) ( ) ( ) (

input causality

A.Cenedese Introduction to Digital Control 16

Z-Transform – 1

Definition: The Z-transform of a discrete time signal s(k) is the function of the complex variable z defined as: p f

∑

∞ −

= = Ζ ) ( ) ( )] ( [

k k

z k s z S k s

The Z-transform converges outside a circle

Im piano z

z plane

R Re piano z

z plane

The Z-transform of a signal s(k) delayed by m steps, s(k-m) with m>0, gives:

1 1

) 1 ( .... ) 1 ( ) ( ) ( )] ( [

+ − − − ∞ −

− + + + − + − + = −

∑

m i i m

z s z m s m s z i s z m k s Z

A.Cenedese Introduction to Digital Control

) ( )] ( [ z S z m k s Z

m −

= −

signal causality

17

Z-Transform – 2

Rules: 1. Linearity: y 2. The Z-transform of a signal s(k) delayed by m steps, s(k-m) with m>0, gives:

) ( ) ( )] ( ) ( [ z bT z aS k bt k as Z + = +

2. The Z transform of a signal s(k) delayed by m steps, s(k m) with m 0, gives:

) ( ) 1 ( .... ) 1 ( ) ( ) ( )] ( [

1 1

z S z z s z m s m s z i s z m k s Z

m m i i m − + − − − ∞ −

= − + + + − + − + = −

∑

3. Scaling in the z-domain:

( )

z a S k s ak

1

)] ( [

−

= Ζ

4. Derivative

( )

z dS k k ) ( )] ( [

5. Convolution

dz z dS z k ks ) ( )] ( [ − = Ζ

A.Cenedese Introduction to Digital Control 18

) ( ) ( )] ( * ) ( [ z T z S k t k s Z =

Transfer Function

∑ ∑

− + − =

M j N i

j k u b i k y a k y ) ( ) ( ) ( ) ( ) ( z U z b z Y z a

M i N i

⋅ = ⋅

∑ ∑

− −

causality

Similarly to the Laplace transform for continuous time systems, the Z transform

∑ ∑

= =

+

j j i i

j k u b i k y a k y

1

) ( ) ( ) ( ) ( ) (

1

z U z b z Y z a

i i

=∑

∑

Similarly to the Laplace transform for continuous time systems, the Z transform allows the definition of transfer function for discrete time systems:

∑

M i

b

∑ ∑

− −

=

N i i i

z a z b z H ) ( ) ( ) ( ) ( z U z H z Y ⋅ =

∑

iz

a

1

Stability: N&S d f h BIBO b l f DLTI

∑

∞

N&S condition for the BIBO stability of a DLTI system is 1. all poles pi of H(z) are s.t. |pi|<1 per ogni i

• r equivalently

A.Cenedese Introduction to Digital Control 19

∞ <

∑

| ) ( | k h

k

2. summable impulse response

Example: FIR system

0.8 1 0.2 0.4 0.6 h(k)

• 0.8
• 0.6
• 0.4
• 0.2

1 2 3 4 5 6

• 1

k

A.Cenedese Introduction to Digital Control 20

DDC system – 1

Controller: discrete system that receives y(k) and provides the control signal u(k) y y( ) p g ( ) The (linear) controller can be characterized by the transfer function D(z).

Controllore Digitale P R O C E S S O H y(t) y(kT) u(kT) u(t)

Digital controller D(z) Process G(s)

Th t f th t i l d d t t h th i t i th t ll

T y(t) y(kT)

D(z) ( )

The rest of the system is a sampled data system where the input is the controller

• utput u(k) and the output is the controller input y(k).

u(k) H u(t) G(s) y(t) y(k)

A.Cenedese Introduction to Digital Control 21

DDC system – 2

Z-transforming… Y(z) = G(z)U(z)

H u(t) G(s) y(t) y(k)

f g ( ) ( ) ( ) G(z) is the transfer function between u(k) and y(k) of an equivalent discrete system:

u(k) u(t) ( )

G(z) is the transfer function between u(k) and y(k) of an equivalent discrete system:

U(z) R(z) D(z) G(z) Y(z)

• Closed loop transfer function:

) ( ) ( ) ( ) ( z G z D z Y W ) ( ) ( 1 ) ( ) ( ) ( ) ( ) ( z G z D z G z D z R z Y z W + = =

A.Cenedese Introduction to Digital Control

Controller synthesis: given G(z), find D(z) s.t. it satisfies the system closed loop specs

22

Frequency Response – 1

Consider: DLTI system with impulsive response: h(k) y p p ( ) input signal: u(k)=Mejθk u(k) is obtained by sampling with timestep T the continuous time signal u(t)=M ejωt u(t)=Mejωt u(k)=MejωkT u(k)= Mejθk with θ=ωT=2πω/Ω where Ω is the sampling frequency The steady state response y(k) of a stable system is

+

∑ ∑ ∑ ∑

∞ − ∞ − − − ) ( ) ( ) ( ) (

) ( ) ( ) ( ) ( ) (

i k j i k j k i k j k i k j

Me i h Me i h Me i h Me i h k y

ϑ ϑ ϑ ϑ

) ( ) ( ) ( ) (

ϑ ϑ ϑ ϑ

ϑ

j jk i j jk

e H k u z H Me Me i h Me

j =

= =

∞ −

∑

= = + = =

∑ ∑ ∑ ∑

= + = = = ) ( 1 ) ( ) ( ) (

) ( ) ( ) ( ) ( ) (

i j k i j i j i j

Me i h Me i h Me i h Me i h k y

The system acts on the signal u(k) with the amplitude and phase of H(ejθ) that is H(z) evaluated at z=ejθ (unit circle)

) ( ) ( ) ( ) (

ϑ

e z i

e H k u z H Me Me i h Me

j

= =

∑

A.Cenedese Introduction to Digital Control 23

evaluated at z e (unit circle)

Frequency Response – 2

H(ejθ): system frequency response The result is similar to what obtained with continuous systems: CLTI Laplace transform evaluated at s=jω (imaginary axis) DLTI Zeta transform evaluated at z=ejθ=ejωT (unit circle) DLTI Zeta transform evaluated at z e e (unit circle)

A.Cenedese Introduction to Digital Control 24

Frequency Response – 3

1.4 1.6 1.8 2

4 6 8 B) Bode Diagram

0.2 0.4 0.6 0.8 1 1.2 m

• d

u lo

• 2

2 4 Magnitude (dB

1 2 3 4 5 6 7 8 9 10 θ=ωΤ −0.2 0.2 0.4 0.6 f a s e

• 4
• 10

ase (deg)

1 2 3 4 5 6 7 8 9 10 −0.8 −0.6 −0.4 θ=ωΤ

10

• 2

10

• 1

10 10

1

• 30
• 20

Pha Frequency (rad/sec)

π θ=ωΤ

Note: Ω/2 Nyquist frequency Ω= 2π/T and ω=θ/T In the range π<θ<2π (Ω/2<ω<Ω) the behavior is the same as in 0<θ<π (ω<Ω/2). Then the behavior is periodic of 2π. For DDC systems the interesting frequency range is θ<<π (ω<<Ω/2): sampling

A.Cenedese Introduction to Digital Control

• C systems the inte esting f equency ange is θ

π (ω / ): sampling frequency much higher than the closed system passband

25

Frequency Response – 4

The DLIT system can be considered as a digital filter, that is able to modify the spectrum of the input signal as traditional analog filters. Likewise, the DDC controller in the control loop is a particular filter designed so as to attain the desired closed loop features. The fundamental difference between the telecom digital filter and the digital controller is that the latter is involved in a closed loop system, while the former acts i l in open loop.

A.Cenedese Introduction to Digital Control 26

Discretization of Continuous Controllers – 1

DDC block scheme:

D(s) y e m’

• D’(z)

H0 G(s)

A possible approach to synthesize a controller D’(z) is to resort to an equivalent A possible approach to synthesize a controller D (z) is to resort to an equivalent continuous time system, and to exploit well established techniques for the synthesis of D(s): continuous time synthesis problem

y m e

• D(s)

G(s)

Once the D(s) has been designed, it is “discretized” into D'(z) (discrete realization problem) s.t. the output m’(t) approximates m(t).

A.Cenedese Introduction to Digital Control

p ) p ( ) pp ( )

27

Discretization of Continuous Controllers – 2

The differences (in behavior) between D’(z) and D(s) depends on: 1. discretization method 2. sampling frequency Increasing Ω (sampling frequency): Increasing Ω (sampling frequency): 1. The step signal from the holder tends to a continuous signal 2. D(z)+H0 tends to D(s) Ω>>ωsys (typical frequency of interest) Ω>>ωB (passband of the system) [Good results if Ω~10/20 ωB ] Note:

• Pros: exploitation of the continuous system experience in the field of digital

controller synthesis controller synthesis

• Cons: the sampling frequency is higher than that needed if the synthesis was

lead in the discrete domain The closed loop system will never be better than the correspondent continuous

A.Cenedese Introduction to Digital Control 28

The closed loop system will never be better than the correspondent continuous system (discrete=approximation of continuous)

Example: Varying the sampling frequency

D(s) y e m’

• D’(z)

H0 G(s)

• utput signal

control signal 2 5 3 3.5 4

• utput signal

C D-0.1 D-1.0 D-4.0 2 5 3 3.5 4 control signal C D-0.1 D-1.0 D-4.0 1 1.5 2 2.5 signal 1 1.5 2 2.5 signal

• 0.5

0.5

• 0.5

0.5

A.Cenedese Introduction to Digital Control 29

5 10 15 20 25 30 35 40 45 50

• 1

time 5 10 15 20 25 30 35 40 45 50

• 1

time

Holder model – 1

The controller “sees” a system to be controlled given by the cascade holder + G(s)

u(k) T H0 u(t) m

Holder model:

• input u(k): sinusoidal function with a frequency

h l h h l f much lower than the sampling frequency

• output m(t): piecewise constant function

(“steplike”) approximating the sin function u(t) The spectral component obtained by m(t) at the same frequency of that of u(t) is of similar amplitude f q y f f ( ) f p (if ω<<Ω)… but shows a delay equal to

] [rad T ω −

A.Cenedese Introduction to Digital Control

] [ 2 rad

30

Holder model – 2

With this model, the holder system can be approximated simply with a delay equal to T/2, that is with the following trasfer function f g f f

2 /

) ( ) (

sT

e s U s M

−

≈

The overall system becomes

y D( ) e-sT/2 G(s) D(s) y y m e

• D(s)

e G(s) y e m’

• D’(z)

H0 G(s)

] [ 2 2 2 rad T Ω = Ω = ωπ π ω ω

The holder effect is negligible if Ω>>ωC: the phase margin reduction introduced by the holder delay is small (ωC crossover frequency for |D(jω)G(jω)|) (ωC crossover frequency for |D(jω)G(jω)|). This gives a first indication for the choice of Ω:

Ω Ω

A.Cenedese Introduction to Digital Control

° ≈ Δ ⇒ ≈ Ω 18 10

ϕ

ω m

c

° ≈ Δ ⇒ ≈ Ω 6 30

ϕ

ω m

c

31

Discretization methods

After completing the controller synthesis in the continuous domain, it is necessary to obtain its discrete version: Given the transfer function D(s), derive a discrete time system D'(z) s.t. D'(z) + H0 used in the DDC loop provides a behaviour “similar” in some D (z) + H0 used in the DDC loop provides a behaviour similar in some sense to that of a continuous control loop using D(s) Ω↑: Several approaches can be used for obtaining the discrete version of D(s) Ω↑: Several approaches can be used for obtaining the discrete version of D(s), which basically translate the “similarity” according to different procedures. In any case, as the sample frequency Ω gets higher, the system becomes more and l “ i il ” t th i i l ti ti t Ω↓: The difference among the discretization methods can be revealed by the b h h h h d b h h h more close “similar” to the original continuous time system. critical value of Ω beneath which the dynamic behaviour worsen too much with respect to the continuous system behavior. The choice of the discretization method gives a lower bound to the acceptable

A.Cenedese Introduction to Digital Control 32

sampling frequency.

Open Loop Discretization methods

The open loop discretization methods consider the D(s) on its own, without taking into account that this is part of a control loop. p f p These are the most used methods for obtaining digital filters from the analog synthesis procedure and digital control algorithms from standard analog controllers The open loop methods do not guarantee (a priori) the stability of the closed synthesis procedure and digital control algorithms from standard analog controllers system loop where the digital controller is inserted, or, in some case, even of the controller itself! Nonetheless, if the Ω is sufficiently high with respect to ωC ,the controller behaviour is similar to the continuous counterpart and stability is preserved. The main classes of the open loop discretization methods are:

• Methods based on the step response invariance
• Methods based on numerical integration
• Methods based on the mapping of zeros/poles

A.Cenedese Introduction to Digital Control 33

pp g f z p

Step Response Invariance

With this method, consider the following scheme:

Y(z) D(s) U(s) Y’(z) Y(z) D’(z) D(s) Y’(z)=Y(z)

The rationale is that the output from D'(z) and the signal obtained by sampling the

• utput from D(s) (in response to the same canonical signal U(s)) are equal

Y (z) D (z)

• utput from D(s) (in response to the same canonical signal U(s)) are equal.

1 1 ⎤ ⎡ ⎤ ⎡D ) (

With step signal u(t):

• )

( ' 1 1 ) ( ' ) ( 1 ) (

1

z D z z Y s D s Z z Y

−

− = = ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ = ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ − =

−

s s D Z z z D ) ( ) 1 ( ) ( '

1

) ( ' ) 1 ( ) ( ' ) ( 1 ) (

2 1 1 2

z D z Tz z Y s D s Z z Y

− −

− = = ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ = ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ − =

− − 2 1 2 1

) ( ) 1 ( ) ( ' s s D Z Tz z z D

With ramp signal u(t):

A.Cenedese Introduction to Digital Control 34

) 1 ( z s ⎦ ⎣ ⎦ ⎣ s Tz

Numerical Integration

A.Cenedese Introduction to Digital Control 35

Numerical Integration – Rectangular Integration 1

The Euler method is the simplest algorithm for numerical integration: forward integration

∫

= dt t u t y ) ( ) (

( ) ( )T

1)T

• (k

u 1)T

• (k

y y(kT) + =

u(t)

f g

∫

t (k-1)T (k+1)T kT

We obtain:

1)T

• u(k

1)

• y(k

y(k) + = U(z)T z Y(z) z Y(z)

• 1
• 1

+ = U(z) 1 Y(z)

1 1 − −

− = z T z

Thus, a trasformation s-plane z-plane is introduced, given by

1 1

s-plane z-plane

1 1

1 1

− −

− = z T z s sT z T z z s − = ⇔ − =

− −

1 1

1 1

s plane p

A.Cenedese Introduction to Digital Control 36

Numerical Integration – Rectangular Integration 2

…Backward integration:

∫

= dt t u t y ) ( ) ( u(kT)T 1)T]

• y[(k

y(kT) + =

t u(t) t (k-1)T (k+1)T kT

We obtain:

1

T u(k)T 1)

• y(k

y(k) + = U(z)T Y(z) z Y(z)

• 1

+ = U(z) 1 Y(z)

1 −

− = z T

Thus, a trasformation s-plane z-plane is introduced, given by

1 = T z z s = ⇔ − =

−

1 1

1

s-plane z-plane

1

1

−

− = z s sT z T s − = ⇔ = 1

A.Cenedese Introduction to Digital Control 37

Numerical Integration – Rectangular Integration 3

The discretization procedure follows:

T z s

s D z D

1

1

) ( ) ( '

−

− =

=

Consider the two frequency responses given by D(s) and D'(z):

• j

D(s) D(jω) D’(z)D’(ejωt) They do not coincide, that is the Euler approximation introduces an error in the frequency response. It results that the approximation is good if

20 > Ω

pp g f

ω

A.Cenedese Introduction to Digital Control 38

Numerical Integration – Trapezoidal Integration 1

• u(t)

( ) ( ) { }

1)T (k (kT) T 1)T (k (kT)

t ( ) (k-1)T (k+1)T kT

( ) ( ) { }

1)T

• (k

u u(kT) 2 1)T

• (k

y y(kT) + + =

We obtain:

1)]

• u(k

[u(k) 2 T 1)

• y(k

y(k) + + = ) z U(z)(1 2 T Y(z) z Y(z)

1

• 1
• +

+ = 1

1 −

+ z T U(z) 1 1 2 Y(z)

1 −

− + = z z T

Thus, a trasformation s-planez-plane is introduced, given by

1 1

1 1 2 1

− −

+ = z T 2 1 1 1 2

1 1

sT sT z z T s + = ⇔ − =

− −

hus, a t asfo mation s plane plane is int oduced, given by

s-plane z-plane

A.Cenedese Introduction to Digital Control 39

1

1 2 − z s 2 1 1

1

sT z T − +

Numerical Integration – Trapezoidal Integration 2

The discretization procedure follows:

1 1

1 1 2

) ( ) ( '

− −

+ − =

=

z z T s

s D z D

Note: the transformation is called bilinear or Tustin transformation.

A.Cenedese Introduction to Digital Control 40

Matched Poles and Zeros – Zero-Pole Mapping

∏

−

m

z s ) (

Starting from the D(s):

∏ ∏

− =

n s s s

p s z s K s D

1

) ( ) ( ) (

1

W b i D’( ) where zs and ps are zeros and poles in the s-plane of D(s). We obtain D’(z) as:

∏

−

m i

z z K z D

1

) ( ) ( '

∏

− =

n i z

p z K z D

1 1

) ( ) ( '

where zi and pi are zeros and poles in the z-plane from (Note: jωejωT):

T z i

s

e z =

T p i

s

e p =

A.Cenedese Introduction to Digital Control

Kz is derived s.t. the static gain of the continuous D(s) is preserved.

41

Example: Discretization method

D(s) y e m’

• D’(z)

H0 G(s)

• utput signal

control signal 1.5

• utput signal

C D-zoh D-tustin D-matched 2.5 3 3.5 control signal C D-zoh D-tustin D-matched 1 signal 1 1.5 2 signal 0.5

• 0.5

0.5

A.Cenedese Introduction to Digital Control 42

5 10 15 20 25 30 35 40 45 50 time 5 10 15 20 25 30 35 40 45 50

• 1

time

Example: Control System Design – 1

Rif T Controller H Process Rif.

• D(z)

H0 (+Act/Trans) G(s)

Problem: Problem: Be the process modeled by: Synthesize a controller D(z) with the specification:

A.Cenedese Introduction to Digital Control 43

Example: Control System Design – 2

Note:

Controller Process

• D(s)

(+Act/Trans) G(s)

The open loop transfer function is:

20 40 Bode Diagram

ω c |L|

The closed loop transfer function is:

• 40
• 20

Magnitude (dB)

c |W|

The given specifications refer to the open loop L(s)

• stability margin Nyquist criterion
• cutoff frequency band of the system

10

• 2

10

• 1

10 10

1

10

2

10

3

• 80
• 60

Frequency (rad/sec)

ff f q y f y Magnitude and phase of L:

A.Cenedese Introduction to Digital Control 44

Example: Control System Design – 3

Solution:

• 1. Choice of the Sampling Period T:
• 2. D-system H0-G equivalent - Step response invariance:

y q p p

A.Cenedese Introduction to Digital Control 45

Example: Control System Design – 4

• 3. Continuous time synthesis:

Bili f

• Bilinear transform
• Frequency pre-warping
• G phase and magnitude at ω ⇒ D phase and magnitude at ω

G phase and magnitude at ωc ⇒ D phase and magnitude at ωc

A.Cenedese Introduction to Digital Control 46

Example: Control System Design – 5

• Controller structure: PI example
• Discretization

A.Cenedese Introduction to Digital Control 47

Example: Control System Design – 6

1 4 1.6 CONT DISC 1 2 1.4 CONT DISC 0 8 1 1.2 1.4 put DISC DISC-D 0 6 0.8 1 1.2 put DISC DISC-D 0.2 0.4 0.6 0.8

• ut

0.2 0.4 0.6 inp

A.Cenedese Introduction to Digital Control 48

0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 time 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

• 0.2

time

Dipartimento di Tecnica e Gestione dei Sistemi Industriali Università di Padova angelo.cenedese@unipd.it

Angelo Cenedese

Introduction to Digital Control 2

A.Cenedese Introduction to Digital Control

Example: Discretization methods

 Consider the following D(s):

< ∞

( )( )

2 1 5 ) ( + + = s s s D

1

• 2

1 =

• =

T

10

• 2

10

• 1

10 10

1

10

2

• 180
• 135
• 90
• 45

P h a s e ( d e g ) Bode Diagram Frequency (rad/sec)

• 40
• 30
• 20
• 10

10 20 M a g n i t u d e ( d B ) 1 2 3 4 5 6 0.5 1 1.5 2 2.5 3 Step Response Time (sec) A m p l i t u d e

A.Cenedese Introduction to Digital Control

... Step Response Invariance

 We obtain:

U(s) Y’(z) Y(z) D’(z) D(s) Y’(z)=Y(z)

• =
• s

s D Z z z D ) ( ) 1 ( ) ( '

1

2

0.1353)

• (z

0.3679)

• (z

0.3679) + (z 0.99894 ) ( ' = z D

10

• 2

10

• 1

10 10

1

10

2

• 180
• 135
• 90
• 45

P h a s e ( d e g ) Bode Diagram Frequency (rad/sec)

• 40
• 30
• 20
• 10

10 20 M a g n i t u d e ( d B ) 1 2 3 4 5 6 0.5 1 1.5 2 2.5 3 Step Response Time (sec) A m p l i t u d e

A.Cenedese Introduction to Digital Control

... Ramp Response Invariance

 We obtain:

U(s) Y’(z) Y(z) D’(z) D(s) Y’(z)=Y(z)

3

0.1353)

• (z

0.3679)

• (z

0.1176) + (z 1.91) + (z 0.42023 ) ( ' = z D

• =
• 2

1 2 1

) ( ) 1 ( ) ( ' s s D Z Tz z z D

10

• 2

10

• 1

10 10

1

10

2

• 180
• 135
• 90
• 45

P h a s e ( d e g ) Bode Diagram Frequency (rad/sec)

• 40
• 30
• 20
• 10

10 20 M a g n i t u d e ( d B ) 1 2 3 4 5 6 0.5 1 1.5 2 2.5 3 Step Response Time (sec) A m p l i t u d e

A.Cenedese Introduction to Digital Control

... Tustin transformation

 We obtain:

4

0.3333)

• (z

z 1) + (z 0.41667 ) ( '

2

= z D

t u(t) (k-1)T (k+1)T kT

1 1

1 1 2

) ( ) ( '

• +
• =

=

z z T s

s D z D

10

• 2

10

• 1

10 10

1

10

2

• 180
• 135
• 90
• 45

P h a s e ( d e g ) Bode Diagram Frequency (rad/sec)

• 40
• 30
• 20
• 10

10 20 M a g n i t u d e ( d B ) 1 2 3 4 5 6 0.5 1 1.5 2 2.5 3 Step Response Time (sec) A m p l i t u d e

A.Cenedese Introduction to Digital Control

... Zero-Pole Mapping

 Note: Map the infinite zeros of G(s) to G(z) according to s = ∞ mapping to z = -1. This can be done until the order of the numerator of G(z) is the same as that of the denominator. In the frequency domain, this heuristic rule forces a zero of G(z) at the highest frequency of interest in a discrete time system. In the discrete time domain, it causes an averaging of the current and past input values.

5

0.1353)

• (z

0.3679)

• (z

1) + (z 0.68322 ) ( ' = z D

• =

n s m s s

p s z s K s D

1 1

) ( ) ( ) (

• =

n i m i z

p z z z K z D

1 1

) ( ) ( ) ( '

T z i

s

e z =

T p i

s

e p =

1 2 3 4 5 6 0.5 1 1.5 2 2.5 3 Step Response Time (sec) A m p l i t u d e 10

• 2

10

• 1

10 10

1

10

2

• 180
• 135
• 90
• 45

P h a s e ( d e g ) Bode Diagram Frequency (rad/sec)

• 40
• 30
• 20
• 10

10 20 M a g n i t u d e ( d B )

A.Cenedese Introduction to Digital Control

Digital PID Controllers

 A classic example of digital controller obtained from the discretization of a continuous time controller is related to PID controllers.  The digital algorithm that realizes the PID action is obtain from discretization of the transfer functions. The obtained algorithms differ because of the discretization procedure but they all tend to behave like the continuous controller they have been derived, as the sampling frequency increase, with respect to the control bandwidth. Still the quantization issues are neglected at this stage.  To ease the modularity and the configurability of the system it is advisable to discretize the blocks separately, in order to obtain the final controller structure (PD… PI… PID…) .  The digital PID can be either “absolute” (position algorithms) or “incremental” (velocity algorithms).

6

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Absolute Algos 1

Note: In the following, we will consider for simplicity the Euler method, although it is not the usually adopted discretization method. These PID algorithms are “absolute” (position) in the sense that at each time step the new value of the control u(k) is computed and provided to the control system.

7

• SP

Y K

P

T/Ti 1 - z -1 1 - z -1 1 - z -1 T

L/ (T+T L)

T

d

T + T L u e H 0 I D

P

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Absolute Algos 2

Derivative Action  The derivative block D is characterized by the transfer function: and in time:  By discretization: hence:

8 L d P d

sT sT K s E s U + = 1 ) ( ) (

[ ] [ ]

T k e k e T K T k u k u T k u

d P d d L d

) 1 ( ) ( ) 1 ( ) ( ) (

• =
• +

[ ]

) 1 ( ) ( ) 1 ( ) (

• +

+

• +

= k e k e T T T K k u T T T k u

L d P d L L d

) ref – y(t (t) , e dt de(t) T K dt (t) du T (t) u

d P d L d

= = + T T T z z T T T z E z U

L L L d d

+

• +

=

• 1

1

1 1 ) ( ) (

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Absolute Algos 3

Integral Action  The output of the block is approximated by a finite sum Or recursively:

9

• =

k n i P i

n e T T K k u ) ( 1 ) ( e(k) T T K ) (k- u (k) u

i P i i

+ = 1

1

1 1

• =

z T T K E(z) (z) U

i P i

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Absolute Algos 4

 It follows from: That the controller can be realized through the following scheme Where the Holder action is taken into overtaken by the output DAC.

10

• SP

Y K

P

T/Ti 1 - z -1 1 - z -1 1 - z -1 T

L/ (T+T L)

T

d

T + T L u e H 0

(k) u (k) u e(k) K u(k)

d i P

+ + =

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Absolute Algos 5

 Conversely, it is possible to resort to the cascade of the three action blocks:  The I-block is given by discretization of the continuous time integral block  The “D-action” block exerts an anticipative action  Note: different discretization methods can be applied

11

u ref Y uI KP I “D-action”

1 1

1 1 ) ( ) (

• +

= z z T T K z E z U

I P I

u k T T T u k T T T T u k T T T u k

L L D L I D L I

( ) ( ) ( ) ( ) = +

• +

+ +

• +
• 1

1

sTI

• + 1

1 ) e(k- e(k)-K T T K ) (k- u (k) u

P I P I I

1 1 1

• +

+ =

( ) ( )

1 1

1 1 ) ( ) (

• +
• +

= z T T z T T z U z U

L D I

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Absolute Algos 6

Implementation:  For both the parallel and the cascade realizations the transfer function of the controller is Where These coefficients can be computed offline during the inizialization of the system, therefore, not affecting the algorithm execution time.

12

2 2 1 1 2 2 1 1

) ( ) ( ) (

• +

+ + + = = z a z a a z b z b b z E z U z D

{ }

,T) ),T (or T ),T (or T ,T f(K ,b a

L D d I i P i i

=

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Incremental 1

 There can be considered algorithms (“incremental” or velocity based) where the variation of the u(k) signal is computed with respect to the previous value u(k-1) where u(k) and u(k-1) can be computed via absolute algo.  Consider the case of a PID algorithm (with no filter on the derivative action) To apply this action to the plant process there is the need of an absolute signal, therefore the actuator has to provide integral action:

13

[ ] [ ] [ ] [ ]

) 2 ( ) 1 ( 2 ) ( ) ( ) 1 ( ) ( ) ( ) ( ) 2 ( ) 1 ( ) 1 ( ) 1 ( ) ( ) ( ) (

• +
• +

+

• =
• +
• +

=

• k

e k e k e T T K k e T T K k e k e K k u k e T T K T k e k e T K k e K T k e k e T K k e K k u

d P i P P i P d P P d P P

m k u n

n k

( ) ( ) = ) 1 ( ) ( ) (

• =
• k

u k u k u

A.Cenedese Introduction to Digital Control

Digital PID Controllers – Incremental 2

 In this case the actuator is part of the regulation system:  One major advantage of using incremental controller is that in case of failure of the digital processing unit, the actuator keeps the its value: the integrator works as an analog memory system.  Moreover, these algorithms are not affected by other issues as the absolute algos, such as the saturation of the integral action.

14

SP

• Y
• u

m algoritmo incrementale integratore attuatore

• Incremental

algorithm Integrator Actuator

A.Cenedese Introduction to Digital Control

Incremental Actuators

 There exist actuators that at every time step, increment the output signal of the amount proportional to the input signal: these are called incremental actuators.  Step motor: at every time k, a number of impulses N(k) proportional to Δu(k) is

• btained. The position θ is incremented by N(k)q (q being the angle related to one

single impulse) and is the actuator output. According to the sign of Δu(k), θ is actually incremented or decremented, and at each time k the position is given by the algebric sum of the received impulses.

15

 The interface between the digital controller and the actuator is particularly simple. The D/A conversion and the holder action is realized directly by the actuator.

A.Cenedese Introduction to Digital Control

Smith’s Delay Compensator – 1

 Presence of delay in the actuator/process/transducer  Estimate of the delay τ: τ=NT  Derivation of the delay-free function G’: G(z) = z-N G’(z)  The delay compensation can be obtained by a control scheme as follows resorting to a parallel connected D(z), so that the resulting transfer function is delay- free from the point of view of the stability analysis.

16

Y

• R

C(z) G(z) D(z)

G'(z) D(z) G'(z) z D(z) G(z) P(z)

• N

= + = + =

( )

G'(z)

• z

D(z)

• N

1 =

A.Cenedese Introduction to Digital Control

Smith’s Delay Compensator – 2

17

 The overall transfer function is derived: and the synthesis of the controller can be done as if the delay was not in.  The control scheme can then be rearranged as follows:

N

z z G z C z G z C z P z C z G z C z R z Y z W

• +

= + = = ) ( ' ) ( 1 ) ( ' ) ( ) ( ) ( 1 ) ( ) ( ) ( ) ( ) (

A.Cenedese Introduction to Digital Control

How to Choose T?

 As a first requirement, it is evident that T>TC , TC being the time required by the digital system to 1. acquire the feedback signal and the reference 2. complete the control algorithm calculations 3. prepare the output data for the DAC  In addition, the CPU must often take care of other activities (within TC): 1. check on input data (e.g. overlimit values, spurious signals,…) 2. input data filtering (e.g. lowpass filter, moving average,…) 3. signal digital conditioning (e.g. zero adjustment, scaling,…) 4. linearization of the input signal (if the acquired signal is not proportional to the desired quantity x but obtained through f(x) there is need to invert f to get to x) 5. alarm check and generation of warnings 6. interrupt management 7. engineering data conversion and visualization (numbers into[V] [A]…) 8. data logging and diagnostics

18

A.Cenedese Introduction to Digital Control

Time Sharing

 In some case there is the need of Time Sharing so as to manage more than one control loop  Hence, the sampling period T: T > T1 + T2 + T3 + .... + Tn Ti = time needed for serving the i-th process

19

t 1 2 n 1 T 2

PROCESSO 1 PROCESSO n PROCESSO i I N P U T O U T P U T PROCESSO 1 PROCESSO i PROCESSO n

C P U

PROCESS1 PROCESS i PROCESS N

A.Cenedese Introduction to Digital Control

System Dynamics and Delays – 1

 The sampled error system is in open loop between two consecutive time steps.  It may happen that events/disturbances/analog references are entering the system as follows:  The controller does not exert any action on the system until kT, and remains at the previously held output value.  If the considered input is the reference it is as if the input value was applied in kT and the system shows a delay of (kT-tg ):

20

t (k-1)T kT (k+1)T t g Tr riferimento o disturbo

t (k-1)T kT (k+1)T riferimento equivalente

Equivalent reference

A.Cenedese Introduction to Digital Control

System Dynamics and Delays – 2

 The delay of (kT-tg ) is added to the response time to a step reference in close loop and does not depend on the passband of the system, but only on the sampling time: BHz  Tr ~ 0.4/BHz T  kT-tg  If the considered input is a disturbance, it keeps acting in open loop for the period (kT-tg ) and the interesting variable can drift too much from the reference value before the compensation starts.  Of course, the worst case scenario is when kT-tg~T.  In the case of step disturbance, T must be less than the time needed for the error to reach the maximum admittable value. Moreover T must be chosen according to the dynamics of the system. With reference to a canonical step signal the finite delay introduced by bad synchronization does not have to affect the system behavior, and it is reasonable to suppose a maximum delay leading to T < 10% Ts

21

A.Cenedese Introduction to Digital Control

Example: First Order System

 If the closed loop step response can be approximated with that of a first order system with time constant τ: TR = 2.3 τ >10 T TR being equal the time to reach 90% of the final value.  The number of samples during τ is: τ /T > 4.3 That is 4 or 5.

22

1 2 3 4 5 6 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1

 In the frequency domain the cutoff frequency at 3dB is ωt=1/τ  At the Nyquist frequency Ω/2, the frequency response of the system is less than 8%-6.5% of the initial value, and can be considered as negligible. This value for Ω is therefore in good agreement with the sampling theorem constraints.

31 25 2 ÷

• =
• T

t

A.Cenedese Introduction to Digital Control

Example: Second Order System

 For a second order system, the rise time TR (10% to 90%) is given by: with ξ =cosφ, ξ damping factor, and ωn natural frequency  Being TR >10 T it follows that for ξ=0.707, it results φ=π/4 and tanφ=1.  Hence ωnT<0.2, that is Ω/ωn>32.

23

n tg R

e T

• /

=

10

/

• tg

n

e T

A.Cenedese Introduction to Digital Control

Holder Delay

 The holder can be approximated by the following transfer function yielding a drop in the phase margin at the crossover frequency ωC Suppose we require a reduction in the phase margin less than φM degrees, we got  To have 6° <φM <12° it must be:

24 2

) (

sT

e s H

• ]

[ 2 rad T

C

• M

C

• 180
• 180

2

• M

CT

30 15 <

• <

C

A.Cenedese Introduction to Digital Control

Quantization

 In general: the higher the sampling frequency, the higher the number of errors introduced by quantization. “High frequency” require “long words”, that is higher numerical resolution. Example:  Consider the process to be controlled given by With the step response invariance discretization  The real number a (pole on the z-plane) is represented with a finite length word, introducing an error in the value actually used by the algorithm equal to δa yielding a variation of the realized time constant τ.

25

• s

K s G + = 1 ) (

1

1 ) ( '

• =

az b z G

a a T

• =
• =

=

ô T

• ô

T

• e

K b , e a 1

ô T

• e

T d da

2

• =

 Decreasing T precision requirement on a!

A.Cenedese Introduction to Digital Control

Example: Deadbeat – 1

Problem: Be the process modeled by: Synthesize a controller C(z) that makes the system deadbeat w.r.t. a step input.

26

R

• Controller

C(z) Process (+Act/Trans) G(z) E U Y

A.Cenedese Introduction to Digital Control

Example: Deadbeat – 2

Solution:  Computation of W(z):  Choice: 1-step DB

27

R

• Controller

C(z) Process (+Act/Trans) G(z) E U Y

A.Cenedese Introduction to Digital Control

Example: Deadbeat – 3

 Computation of C(z):  Computation of U(z):

28

R

• Controller

C(z) Process (+Act/Trans) G(z) E U Y

2 4 6 8 10 12 14 16 18 20

• 0.2

0.2 0.4 0.6 0.8 1 1.2

k e ( k )

2 4 6 8 10 12 14 16 18 20 0.2 0.4 0.6 0.8 1 1.2 1.4

k y ( k )

2 4 6 8 10 12 14 16 18 20

• 1.5
• 1
• 0.5

0.5 1 1.5

k u ( k )

A.Cenedese Introduction to Digital Control

Example: Deadbeat – 4

 Computation of U1(z) (no oscillations):

• K such as to preserve unity static gain: K=1/1.8
• 2-step DB!

29

2 4 6 8 10 12 14 16 18 20

• 0.3
• 0.2
• 0.1

0.1 0.2 0.3 0.4 0.5 0.6

k u ( k )

2 4 6 8 10 12 14 16 18 20 0.2 0.4 0.6 0.8 1 1.2 1.4

k y ( k )

2 4 6 8 10 12 14 16 18 20

• 0.2

0.2 0.4 0.6 0.8 1 1.2

k e ( k )

A.Cenedese Introduction to Digital Control

Discrete time Space State Modeling – 1

30

 State space formulation of a discrete time system:

• State x (n-dimensional)
• Input u (m-dimensional)
• Output y (p-dimensional)

 State and output evolution:

A.Cenedese Introduction to Digital Control

Discrete time Space State Modeling – 2

31

 Z-transforming:  Transfer function (matrix!):

A.Cenedese Introduction to Digital Control

Discrete time Space State Modeling – 3

32

 Discrete Time System modes: Jordan form of F

A.Cenedese Introduction to Digital Control

Discrete time Space State Modeling – 4

33

 Finite Memory system:  Deadbeat Controller:

Y R Σ K X

A.Cenedese Introduction to Digital Control

References

34

 K.Ogata, Discrete-Time Control Systems (2nd Edition), Prentice Hall, 1994  G.F.Franklin, J.D.Powell, M.L.Workman, Digital Control of Dynamic Systems (3rd Edition), Prentice Hall, 1997