 
              I/O Systems Sunu Wibirama
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Introduction  Main job of computer : I/O and processing (the latter is rarely happened)  Browsing: read and enter information, not compute an answer  OS: manage, control I/O devices and operations  What we will explore today:  I/O Hardware  Application I/O Interface  Kernel I/O Subsystem  What should you read by yourself:  Transforming I/O Requests to Hardware Operations  STREAMS  Performance 13.
KERNEL Kernel is the core of operating system Kernel’s main task: resource management, communication between hardware & software
I/O Hardware  Major concern of OS designer is: I/O support. Why?  Incredible variety of I/O devices: mouse, hard disk, cd-rom, usb, etc .  Common concepts of I/O hardware elements:  Port / connection point (ex.: serial port, parallel port)  Bus: wires with spesific protocol  Controller ( host adapter ) : collection of electronics that can operate a port, a bus, or a device. Serial-port controller v.s. SCSI controller  Details are encapsulated in device-driver module in OS kernel  Device drivers: uniform I/O instructions to control I/O devices  Controller has one or more registers for data and control signals  How processor give commands / data to a controller for I/O transfer?  Direct I/O instructions using bus: send special instructions to an I/O port address. Must select proper device and send data to device register  Memory-mapped I/O: device registers are mapped into the address space of the processor 13.
A Typical PC Bus Structure PCI bus - connected to fast devices Expansion bus - connected to slow devices
Device I/O Port Locations on PCs (partial) Graphic controller : memory-mapped I/O to hold screen contents, because writing data into memory-mapped region is faster than issuing millions of instructions 13.
I/O Port’s Register  Data-in register: read by the host to get input  Data-out register: written by the host to send output  Status register: contain status bits that can be read by the host  Control register: can be written by the host to start command or to change the mode of the device. Example:  Full-duplex or half-duplex mode; Duplex: communicate (send and receive message). Half-duplex: only one activity at one time. Full-duplex: can either send or receive information at the same time. 13.
I/O Transfer Control  Determine when the next data transfer occurs:  Polling  Interrupts  Direct Memory Access (DMA) 13.
Polling  CPU (Host) keeps checking I/O Controller status register until detect new input data arrives OR output devices ready for next data.  Going on a trip an ask: “Are we there yet?” “Are we there yet?” “Are we there yet?”  Controller:  Status register: 1 - busy and 0 - clear  Host:  Command register: command-ready bit  Handshaking step (repeated for each byte):  Host repeatedly read busy bit until that bit becomes clear (busy waiting or polling)  Host sets the write bit in the command register and writes a byte into the data-out register  Host sets command-ready bit  Controller notices that command-ready bit is set, it sets the busy bit  Controller reads the command register, sees the write command. It reads data-out register to get the byte and does the I/O to the device  Controller clears command-ready bit, clears error bit in the status register to indicate I/O succeeded, clears the busy bit to indicate that I/O operation is finished 13.
Interrupt  Polling is inefficient if rarely find idle devices, but large tasks remain undone. How to solve?  How about: device sends special signal to CPU when new data arrives OR device ready for next data  Going on a trip an ask: “Wake me when we get there!”  Interrupt : Notify CPU if device is ready, instead of polling repeatedly 13.
Interrupt-Driven I/O Cycle 13.
Direct Memory Access (DMA)  Large data transfer: disk drive  CPU is kept from exhausted work: avoid programmed I/O for large data movement ( programmed I/O = watch status bits and to feed data into a controller register one byte at a time)  How? Bypasses CPU to transfer data directly between I/O device and memory. Delegating CPU tasks to DMA controller.  Initiate DMA transfer:  CPU writes a DMA command block into memory  This command block contains: pointer to the source of transfer, pointer to the destination of transfer, and a count of the number of bytes to be transferred  CPU writes the address of command block to DMA controller and let the DMA controller do the rest 13.
Six Step Process to Perform DMA Transfer 13.
Application I/O Interface  Explain interface and techniques of OS to treat I/O devices in standard way (such as open a file on a disk without knowing what kind of disk it is).  I/O system calls encapsulate device behaviors in generic classes  Device-driver layer hides differences among I/O controllers from kernel  Devices vary in many dimensions  Character-stream or block  Sequential or random-access  Sharable or dedicated  Speed of operation  read-write, read only, or write only 13.
Characteristics of I/O Devices 13.
A Kernel I/O Structure uniformity think the structure as organization structure: head of organization doesn’t need to know the detail 13.
Kernel I/O Subsystem  Kernel provides many services to I/O, such as:  scheduling  buffering  caching  spooling  device reservation  error handling  These are provided by I/O subsystem, build on hardware and device-driver infrastructure 13.
Kernel I/O Subsystem  Scheduling  Meaning: to determine a good order to execute I/O requests  Can improve overall system performance  Some I/O request ordering via per-device queue  Some OSs try fairness  Buffering - store data in memory while transferring between devices  To deal with device speed mismatch ( modem v.s. storage )  To deal with device transfer size mismatch ( large data re-assembling in computer networking )  To maintain “copy semantics” (data reliability when write() system call is executed. Copying an opened large Ms. Word file to USB flash drive ) 13.
Sun Enterprise 6000 Device-Transfer Rates Logarithmic scale 13.
Kernel I/O Subsystem  Caching - fast memory holding copy of data (do you remember the function of proxy server in networking? - you need to press CTRL+F5 to renew the cache )  Always just a copy (not the only existing item - as buffer does)  Key to performance  Spooling - hold output for a device  If device can serve only one request at a time  i.e., Printing - no interleave allowed  Device reservation - provides exclusive access to a device  System calls for allocation and deallocation  Watch out for deadlock 13.
Error Handling  OS can recover from disk read, device unavailable or defective, transient write failures  Most return an error number or code when I/O request fails  Unix : errno 2 - no such file or directory  System error logs hold problem reports 13.
I/O Protection  User process may accidentally or purposefully attempt to disrupt normal operation via illegal I/O instructions  All I/O instructions defined to be privileged: I/O must be performed via OS ʼ system calls  Memory-mapped and I/O port memory locations must be protected too (ex.: graphic games and video editing should access the memory directly. OS should protects a block of memory for graphic processing at one time) Memory layout 13.
Kernel Data Structures  Kernel keeps state info for I/O components, including open file tables, network connections, character device state  Many, many complex data structures to track buffers, memory allocation, “dirty” blocks  Unix uses object-oriented methods to encapsulate “differences” (for example: read() operation, the semantics is different for each I/O devices)  Windows uses message passing to implement I/O  I/O request is converted into a message through the kernel to the I/O manager and then to device driver, each of which may change the message contents.  For output, the message contains data to be written. For input, the message contains buffer to receive data. 13.
Life cycle of I/O Request (using DMA)
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