HW-SW Interfaces HW-SW Interfaces Abstraction and Design Abstraction and Design for Multi-Processor SoC for Multi-Processor SoC Dr. Ahmed Amine JERRAYA TIMA Laboratory 46 Avenue Felix Viallet 38031 Grenoble Cedex France Tel: +33 476 57 47 59 Fax: +33 476 47 38 14 MPSoC’04 Email: Ahmed.Jerraya@imag.fr
This is Team Work � Staff members: P. Amblard, W. Cesário, X. Chen, F. Rousseau, S. Yoo (left April ’04), N. Zergainoh � Ph.D. students: Y. Atat, I. Bacivarov, M. Bonaciu, A. Bouchhima, A. Grasset, L. Kriaa, Y. Paviot, A. Sarmento, A. Sasongko, W. Youssef � Industrial Ph.D.: A. Blampey, M. Fiandino, F. Hunsinger, L. Pieralisi (STMicroelectronics) � Collaborative Ph.D.: Y. Cho, S. Han (Korea) G. Majauskas (Lithuania) I. Petkov (Bulgaria) � Master students and Undergraduates: F. Dumitrascu, S. Hadhri, R. Khrouf, K. Popovici, M. Yahia, Ahmed A. Jerraya MPSoC’04 - 2
The SoC Era Challenges � SoC: put on a chip what we used to put on one or several boards (ASIC, CPU, Memories, Analog/RF, MEMS, …) � Facts: g 90% of new ASICs already include a CPU in 130nm. g Multimedia, network processors, mobile terminals and game applications are already multiprocessors. � Fundamental changes: g MPSoC is different from ASIC g MPSoC is different from SW g MPSoC requires abstract HW-SW interfaces to allow fast integrations. � Challenges g Generic MPSoC platform (programmable, reconfigurable, …) g Specific MPSoCs using standard IP with specific interconnect. Ahmed A. Jerraya MPSoC’04 - 3
Generic SoC Platform vs. Application-Specific MPSoC (MPSoC’03 after dinner discussion) Example: The GSM History/Roadmap � 1986 Rack in a van � 1990 PCB � 1995 Chip set in a hand-set � 2002 SoC � 2006 SW component on a generic platform, e.g. Nomadic (ST) Same roadmap for game computers, MP3, STB, NP, DVD Ahmed A. Jerraya MPSoC’04 - 4
Outline 1. HW-SW Interfaces: From Wires to Abstract Interconnect 2. Abstracting HW-SW Interfaces 3. HW-SW Interfaces Design & Debug: The ROSES Environment 4. MPSoC Design 4.1. MPEG4 Design Example 4.2. Results Analysis Ahmed A. Jerraya MPSoC’04 - 5
SoC Platform vs. Embedded Software � Application SW design: g Real time SW Models g Platform model, e.g. Sony PlayStation, Nomadic Application software g Key Issue: Complexity (GB, ms) � Platform_API: Platform_API g Programming model to build software HdS g Specific to application MPSoC Design g Hides HW details CPU sub-system � Hardware dependent SW (HdS) HW interfaces g Provided by SoC designer in case of specific HW g Lower SW layers to access HW NoC g Specific SoC function (e.g. DSP SW code) g Key issue: Performances (K&MB, ns) � Hardware sub-system HW interfaces g CPU sub-systems g Specific hardware, Analog, memories, … HW components � Network-on-Chip � HW interfaces: required for application specific HW/SW interfaces Ahmed A. Jerraya MPSoC’04 - 6
Hardware dependent SW Design & Debug is The Bottelneck Example: SW Debug of an MPEG4 CoDec Data dependent computation C library bug Application SW 5 5 Booting is not synchronized among 12 processors. 30 12 Lost some interrupts HdS (78%) Wrong interrupt priority levels HAL 13 13 5 5 Context switch does not work correctly. µ-Kernel Bugs % Incorrect FIFO counter value causes Parallel Prog. Model deadlock. Result of compressed video is not Memory Map correct. Abnormal execution of a portion of C code Design Environment Ahmed A. Jerraya MPSoC’04 - 7
Outline 1. HW-SW Interfaces: From Wires to Abstract Interconnect 2. Abstracting HW-SW Interfaces 3. HW-SW Interfaces Design & Debug: The ROSES Environment 4. MPSoC Design 4.1. MPEG4 Design Example 4.2. Results Analysis Ahmed A. Jerraya MPSoC’04 - 8
Heterogeneous MPSoC Design Space � Software Programming model on an existing platform � Concurrency � Decomposition T 1 T 3 T 5 T 6 � Mapping T 2 T 4 � Communication API API � Synchronisation � Interconnect HdS HdS CPU 1 1 CPU 2 m U e � NoC Programming Model P t s C y s b u � HW Adaptation for application sub system sub system s specific communication HW IF HW IF Com. Network � Computation subsystem model � CPU sub-system for application specific computation � SW Adaptation Ahmed A. Jerraya MPSoC’04 - 9
Which Parallel Programming Model to Use ? communication Interconnection decomposition concurrency mapping synchronization Interface More More Explicit IMPLICIT Explicit concurrency, decomposition, mapping; Implicit � communication, synchronization, Interconnection and Interface g SDL, compositional C++ Explicit concurrency, decomposition, mapping, communication, � synchronization; Implicit Interconnection and Interface g MPI, TLM Message, thread package, concurrent C Explicit concurrency, decomposition, mapping, communication, � synchronization, Interconnection; Implicit Interface g TLM Transaction All explicit � g ISA SW + RTL HW Ahmed A. Jerraya MPSoC’04 - 10
Abstracting HW-SW Interfaces for A Software Sub-system � API-SW = SW programming SW model � API-HW = NoC programming SW adaptation API-SW (HdS) model HAL � Abstract CPU sub-system HW-SW Interfaces Abstract CPU SS � HAL = HW abstraction layer � HW services: local HW services API-HW architecture (e.g. bus) HW adaptation � SW adaptation : implement NoC programming model on CPU sub- system � HW adaptation: adapt CPU sub- system to NoC Ahmed A. Jerraya MPSoC’04 - 11
The Virtual Component Model � Virtual component g Component Component 2 Component 1 � Hardware IP � Software IP � Functional IP Abstract Abstract g Abstract Interfaces � Required Services Interface 2 Interface 1 � Provided Services Execution Environment � Control Services � Synchronization � Parameters, …. � Execution Environment g Abstract Platform (e.g. NoC, Cosimulation backplane, …) � Heterogeneous components thanks to adaptation between different programming models. Ahmed A. Jerraya MPSoC’04 - 12
The Virtual Component Model for MPSoC Basic model: a set of hierarchically interconnected virtual modules � and an execution environment Virtual Module: � g Content: Tasks/Instances + communication channels) g Abstract interface: set of virtual ports g Internal/external ports g Structure and services Internal port (comp. prog. Abs. level Protocol SW component HW component Virtual Processor Virtual IP model) TLM rd/wr SW SW HW HW task 1 task 2 block 1 block 2 External port RT level AMBA Execution environment (e.g. AMBA bus) (NoC prog. Model) Colif: An XML object-oriented database for virtual architectures g Components programming models g NoC programming models g MPSoC programming model is the composition of NoC and g components programming models. Ahmed A. Jerraya MPSoC’04 - 13
Outline 1. HW-SW Interfaces: From Wires to Abstract Interconnect 2. Abstracting HW-SW Interfaces 3. HW-SW Interfaces Design & Debug: The ROSES Environment 4. MPSoC Design 4.1. MPEG4 Design Example 4.2. Results Analysis Ahmed A. Jerraya MPSoC’04 - 14
System-level SoC Design Flow System Specification System specification is a � Virtual Processor Virtual IP Virtual Processor Virtual IP SW component HW component Virtual Processor Virtual IP virtual architecture: virtual modules using specific SW SW HW HW programming models task 1 task 2 block 1 block 2 connected through an execution environment. Execution environment (e.g. AMBA bus) Architecture implementation: � heterogeneous components and sophisticated communication interconnect to SW Basic SW interface component API SW comp. components adapt different programming (Tasks) models. Basic HW interface component SW interface sub-system … (SW wrapper) API CPU API HW comp. CPU HW Automatic generation of sub-system � component … application-specific HW/SW HW interface HW interface sub-system sub-system interface sub-systems from API network (HW wrapper) (HW wrapper) basic interface components and CPU sub-system models. Communication interconnect (e.g. NoC) Ahmed A. Jerraya MPSoC’04 - 15
Key Technology: Composing Interfaces Component interface � g Required/Provided services Component g Control and Synchronization services services g Parameters Abstract interface Interface sub-system composition � services g Services matching Execution g User-extensible library environment g Code specialization Component send Interface Interface component send library sub-system Sched. IT MPI ARM7 composition Scheduler channel boot ISR I/O write Works for HW, SW, Execution Data I/O Unix IPC conv. driver environment and Functional interface sub-systems Ahmed A. Jerraya MPSoC’04 - 16
Outline 1. HW-SW Interfaces: From Wires to Abstract Interconnect 2. Abstracting HW-SW Interfaces 3. HW-SW Interfaces Design & Debug: The ROSES Environment 4. MPSoC Design 4.1. MPEG4 Design Example 4.2. Results Analysis Ahmed A. Jerraya MPSoC’04 - 17
MPSoC Design of a DivX Encoder � OpenDivX - fDCT Quant g Open source Mpeg4 DeQuant encoder/decoder i fDCT g Modified to work concurrently on Movement detection & 1/4 th of each frame compensation � Goals g Refinement of HW/SW interfaces g Multi-level simulation and early validation g SW debug before HW platform is ready. Ahmed A. Jerraya MPSoC’04 - 18
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