Hardware basics CS 2XA3 Term I, 2020/21 Outline Basic - - PowerPoint PPT Presentation

hardware basics cs 2xa3
SMART_READER_LITE
LIVE PREVIEW

Hardware basics CS 2XA3 Term I, 2020/21 Outline Basic - - PowerPoint PPT Presentation

Hardware basics CS 2XA3 Term I, 2020/21 Outline Basic architecture Byte order Endianess NASM 64 Hardware platform Basic architecture fetch instructions data memory bus 64 bits 64 bits execute registers 64 bits CPU memory


slide-1
SLIDE 1

Hardware basics CS 2XA3

Term I, 2020/21

slide-2
SLIDE 2

Outline

Basic architecture Byte order – Endianess NASM 64 Hardware platform

slide-3
SLIDE 3

Basic architecture

CPU Central Processing Unit registers memory instructions

64 bits

data

64 bits

memory bus

64 bits

fetch execute store

slide-4
SLIDE 4

◮ Average Desktop Processor speed is 1.5 to 2.5 GHz ◮ Average Laptop Processor Speed is 1.0 GHz ◮ One gigahertz is equal to 1,000,000,000 Hz. ◮ Gigahertz is used to measure CPU clock speed.

slide-5
SLIDE 5

Byte order – Endianess

Whenever a number is represented by more than one byte, the question arises as to the order in which the bytes are arranged. ◮ If the most significant bits come first, that is, are stored at the lowest memory address or at the first location in the file, the representation is said to be big-endian. ◮ If the least significant bits come first, the representation is said to be little-endian.

slide-6
SLIDE 6

bit pattern 00001101 00000110 11111111 00000010 hex pattern 0D 06 80 03 decimal value 13 6 128 3 big-endian 13 ∗ 2563 + 6 ∗ 2562 + 128 ∗ 256 + 3 = 218, 529, 795 little-endian 3 ∗ 2563 + 128 ∗ 2562 + 6 ∗ 256 + 13 = 58, 721, 805

slide-7
SLIDE 7

Most computers these days are little-endian since the Intel and AMD processors that most PCs use are little-endian. Big-endian is the most common format in data networking; for this reason, big-endian byte order is also referred to as network byte order. Netwide Assembler (NASM for short) 64 being an x86-64 platform (Intel) is little-endian.

slide-8
SLIDE 8

NASM 64 Hardware platform

There are 16 64-bit registers: RAX, RBX, RCX, RDX, RSI, RDI, RSP , RBP , R8, ..., R15. The registers the callee (called function) must preserve for the caller are referred to as callee-saved registers.

64-bit 32-bit 16-bit 8-bit register description subreg subreg subreg(s) RAX

Used for return values from functions

EAX AX AL, AH RBX

Callee-saved register. Must be saved/restored !

EBX BX BL, BH RCX

Some instructions also use it as a counter.

ECX CX CL, CH RDX EDX DX DL, DH

AL AH AX EAX RAX

slide-9
SLIDE 9

64-bit 32-bit 16-bit 8-bit register description subreg subreg subreg(s) RSI

Used to pass function arg. #2 in 64-bit Linux.

ESI SI SIL RDI

Used to pass function arg. #1 in 64-bit Linux.

EDI DI DIL RSP

The Stack Pointer. Points to the top of the stack.

ESP SP SPL

Do not use without fully understanding its role.

RBP

The Base Pointer. Points to the “base”.

EBP BP BPL

Do not use without fully understanding its role.

DIL DI EDI RDI

slide-10
SLIDE 10

64-bit 32-bit 16-bit 8-bit register description subreg subreg subreg(s) R8 R8D R8W R8B R9 R9D R9W R9B R10 R10D R10W R10B R11 R11D R11W R11B R12

Callee-saved register. Must be saved/restored !

R12D R12W R12B R13

Callee-saved register. Must be saved/restored !

R13D R13W R13B R14

Callee-saved register. Must be saved/restored !

R14D R14W R14B R15

Callee-saved register. Must be saved/restored !

R15D R15W R15B

R8B R8W R8D R8