Hamiltonian Cycle, 3-Color, Circuit-SAT Lecture 24 April 25, 2017 - - PowerPoint PPT Presentation

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Hamiltonian Cycle, 3-Color, Circuit-SAT Lecture 24 April 25, 2017 - - PowerPoint PPT Presentation

CS 374: Algorithms & Models of Computation, Spring 2017 Hamiltonian Cycle, 3-Color, Circuit-SAT Lecture 24 April 25, 2017 Chandra Chekuri (UIUC) CS374 1 Spring 2017 1 / 58 Recap NP : languages that have non-deterministic polynomial


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CS 374: Algorithms & Models of Computation, Spring 2017

Hamiltonian Cycle, 3-Color, Circuit-SAT

Lecture 24

April 25, 2017

Chandra Chekuri (UIUC) CS374 1 Spring 2017 1 / 58

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SLIDE 2

Recap

NP: languages that have non-deterministic polynomial time algorithms

Chandra Chekuri (UIUC) CS374 2 Spring 2017 2 / 58

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SLIDE 3

Recap

NP: languages that have non-deterministic polynomial time algorithms A language L is NP-Complete iff L is in NP for every L′ in NP, L′ ≤P L

Chandra Chekuri (UIUC) CS374 2 Spring 2017 2 / 58

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SLIDE 4

Recap

NP: languages that have non-deterministic polynomial time algorithms A language L is NP-Complete iff L is in NP for every L′ in NP, L′ ≤P L L is NP-Hard if for every L′ in NP, L′ ≤P L.

Chandra Chekuri (UIUC) CS374 2 Spring 2017 2 / 58

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Recap

NP: languages that have non-deterministic polynomial time algorithms A language L is NP-Complete iff L is in NP for every L′ in NP, L′ ≤P L L is NP-Hard if for every L′ in NP, L′ ≤P L.

Theorem (Cook-Levin)

SAT is NP-Complete.

Chandra Chekuri (UIUC) CS374 2 Spring 2017 2 / 58

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Pictorial View

P NP NP-C NP-Hard

Chandra Chekuri (UIUC) CS374 3 Spring 2017 3 / 58

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P and NP

Possible scenarios:

1

P = NP.

2

P = NP

Chandra Chekuri (UIUC) CS374 4 Spring 2017 4 / 58

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SLIDE 8

P and NP

Possible scenarios:

1

P = NP.

2

P = NP Question: Suppose P = NP. Is every problem in NP \ P also NP-Complete?

Chandra Chekuri (UIUC) CS374 4 Spring 2017 4 / 58

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P and NP

Possible scenarios:

1

P = NP.

2

P = NP Question: Suppose P = NP. Is every problem in NP \ P also NP-Complete?

Theorem (Ladner)

If P = NP then there is a problem/language X ∈ NP \ P such that X is not NP-Complete.

Chandra Chekuri (UIUC) CS374 4 Spring 2017 4 / 58

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SLIDE 10

Today

NP-Completeness of three problems: Hamiltonian Cycle 3-Color Circuit SAT Important: understanding the problems and that they are hard. Proofs and reductions will be sketchy and mainly to give a flavor

Chandra Chekuri (UIUC) CS374 5 Spring 2017 5 / 58

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Part I NP-Completeness of Hamiltonian Cycle

Chandra Chekuri (UIUC) CS374 6 Spring 2017 6 / 58

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Directed Hamiltonian Cycle

Input Given a directed graph G = (V , E) with n vertices Goal Does G have a Hamiltonian cycle?

Chandra Chekuri (UIUC) CS374 7 Spring 2017 7 / 58

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Directed Hamiltonian Cycle

Input Given a directed graph G = (V , E) with n vertices Goal Does G have a Hamiltonian cycle? A Hamiltonian cycle is a cycle in the graph that visits every vertex in G exactly once

Chandra Chekuri (UIUC) CS374 7 Spring 2017 7 / 58

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Is the following graph Hamiltonianan?

(A) Yes. (B) No.

Chandra Chekuri (UIUC) CS374 8 Spring 2017 8 / 58

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Directed Hamiltonian Cycle is NP-Complete

Directed Hamiltonian Cycle is in NP: exercise Hardness: We will show 3-SAT ≤P Directed Hamiltonian Cycle

Chandra Chekuri (UIUC) CS374 9 Spring 2017 9 / 58

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Reduction

Given 3-SAT formula ϕ create a graph Gϕ such that Gϕ has a Hamiltonian cycle if and only if ϕ is satisfiable Gϕ should be constructible from ϕ by a polynomial time algorithm A Notation: ϕ has n variables x1, x2, . . . , xn and m clauses C1, C2, . . . , Cm.

Chandra Chekuri (UIUC) CS374 10 Spring 2017 10 / 58

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Reduction: First Ideas

Viewing SAT: Assign values to n variables, and each clauses has 3 ways in which it can be satisfied. Construct graph with 2n Hamiltonian cycles, where each cycle corresponds to some boolean assignment. Then add more graph structure to encode constraints on assignments imposed by the clauses.

Chandra Chekuri (UIUC) CS374 11 Spring 2017 11 / 58

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The Reduction: Phase I

Traverse path i from left to right iff xi is set to true Each path has 3(m + 1) nodes where m is number of clauses in ϕ; nodes numbered from left to right (1 to 3m + 3)

x2 x3

x1 x4

Chandra Chekuri (UIUC) CS374 12 Spring 2017 12 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

”Buffer” vertices

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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The Reduction: Phase II

Add vertex cj for clause Cj. cj has edge from vertex 3j and to vertex 3j + 1 on path i if xi appears in clause Cj, and has edge from vertex 3j + 1 and to vertex 3j if ¬xi appears in Cj.

x2 x3

¬x1 ∨ ¬x2 ∨ ¬x3

x1

x1 ∨ ¬x2 ∨ x4

x4

Chandra Chekuri (UIUC) CS374 13 Spring 2017 13 / 58

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Correctness Proof

Proposition

ϕ has a satisfying assignment iff Gϕ has a Hamiltonian cycle.

Proof.

⇒ Let a be the satisfying assignment for ϕ. Define Hamiltonian cycle as follows

If a(xi) = 1 then traverse path i from left to right If a(xi) = 0 then traverse path i from right to left For each clause, path of at least one variable is in the “right” direction to splice in the node corresponding to clause

Chandra Chekuri (UIUC) CS374 14 Spring 2017 14 / 58

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Hamiltonian Cycle ⇒ Satisfying assignment

Suppose Π is a Hamiltonian cycle in Gϕ If Π enters cj (vertex for clause Cj) from vertex 3j on path i then it must leave the clause vertex on edge to 3j + 1 on the same path i

If not, then only unvisited neighbor of 3j + 1 on path i is 3j + 2 Thus, we don’t have two unvisited neighbors (one to enter from, and the other to leave) to have a Hamiltonian Cycle

Similarly, if Π enters cj from vertex 3j + 1 on path i then it must leave the clause vertex cj on edge to 3j on path i

Chandra Chekuri (UIUC) CS374 15 Spring 2017 15 / 58

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Example

x2 x3

x1 x4

Chandra Chekuri (UIUC) CS374 16 Spring 2017 16 / 58

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Hamiltonian Cycle = ⇒ Satisfying assignment (contd)

Thus, vertices visited immediately before and after Ci are connected by an edge We can remove cj from cycle, and get Hamiltonian cycle in G − cj Consider Hamiltonian cycle in G − {c1, . . . cm}; it traverses each path in only one direction, which determines the truth assignment

Chandra Chekuri (UIUC) CS374 17 Spring 2017 17 / 58

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Hamiltonian Cycle

Problem

Input Given undirected graph G = (V , E) Goal Does G have a Hamiltonian cycle? That is, is there a cycle that visits every vertex exactly one (except start and end vertex)?

Chandra Chekuri (UIUC) CS374 18 Spring 2017 18 / 58

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NP-Completeness

Theorem

Hamiltonian cycle problem for undirected graphs is NP-Complete.

Proof.

The problem is in NP; proof left as exercise. Hardness proved by reducing Directed Hamiltonian Cycle to this problem

Chandra Chekuri (UIUC) CS374 19 Spring 2017 19 / 58

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Reduction Sketch

Goal: Given directed graph G, need to construct undirected graph G ′ such that G has Hamiltonian Path iff G ′ has Hamiltonian path

Reduction

b v a d c

Chandra Chekuri (UIUC) CS374 20 Spring 2017 20 / 58

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Reduction Sketch

Goal: Given directed graph G, need to construct undirected graph G ′ such that G has Hamiltonian Path iff G ′ has Hamiltonian path

Reduction

Replace each vertex v by 3 vertices: vin, v, and vout

b v a d c

Chandra Chekuri (UIUC) CS374 20 Spring 2017 20 / 58

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Reduction Sketch

Goal: Given directed graph G, need to construct undirected graph G ′ such that G has Hamiltonian Path iff G ′ has Hamiltonian path

Reduction

Replace each vertex v by 3 vertices: vin, v, and vout A directed edge (a, b) is replaced by edge (aout, bin)

b v a d c

Chandra Chekuri (UIUC) CS374 20 Spring 2017 20 / 58

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SLIDE 35

Reduction Sketch

Goal: Given directed graph G, need to construct undirected graph G ′ such that G has Hamiltonian Path iff G ′ has Hamiltonian path

Reduction

Replace each vertex v by 3 vertices: vin, v, and vout A directed edge (a, b) is replaced by edge (aout, bin)

b v a d c bo vi ao v vo di ci

Chandra Chekuri (UIUC) CS374 20 Spring 2017 20 / 58

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Reduction: Wrapup

The reduction is polynomial time (exercise) The reduction is correct (exercise)

Chandra Chekuri (UIUC) CS374 21 Spring 2017 21 / 58

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Hamiltonian Path

Input Given a graph G = (V , E) with n vertices Goal Does G have a Hamiltonian path? A Hamiltonian path is a path in the graph that visits every vertex in G exactly once

Chandra Chekuri (UIUC) CS374 22 Spring 2017 22 / 58

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Hamiltonian Path

Input Given a graph G = (V , E) with n vertices Goal Does G have a Hamiltonian path? A Hamiltonian path is a path in the graph that visits every vertex in G exactly once

Theorem

Directed Hamiltonian Path and Undirected Hamiltonian Path are NP-Complete.

Chandra Chekuri (UIUC) CS374 22 Spring 2017 22 / 58

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Part II NP-Completeness of Graph Coloring

Chandra Chekuri (UIUC) CS374 23 Spring 2017 23 / 58

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Graph Coloring

Problem: Graph Coloring Instance: G = (V , E): Undirected graph, integer k. Question: Can the vertices of the graph be colored using k colors so that vertices connected by an edge do not get the same color?

Chandra Chekuri (UIUC) CS374 24 Spring 2017 24 / 58

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Graph 3-Coloring

Problem: 3 Coloring Instance: G = (V , E): Undirected graph. Question: Can the vertices of the graph be colored using 3 colors so that vertices connected by an edge do not get the same color?

Chandra Chekuri (UIUC) CS374 25 Spring 2017 25 / 58

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Graph 3-Coloring

Problem: 3 Coloring Instance: G = (V , E): Undirected graph. Question: Can the vertices of the graph be colored using 3 colors so that vertices connected by an edge do not get the same color?

Chandra Chekuri (UIUC) CS374 25 Spring 2017 25 / 58

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Graph Coloring

Observation: If G is colored with k colors then each color class (nodes of same color) form an independent set in G. Thus, G can be partitioned into k independent sets iff G is k-colorable.

Chandra Chekuri (UIUC) CS374 26 Spring 2017 26 / 58

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Graph Coloring

Observation: If G is colored with k colors then each color class (nodes of same color) form an independent set in G. Thus, G can be partitioned into k independent sets iff G is k-colorable. Graph 2-Coloring can be decided in polynomial time.

Chandra Chekuri (UIUC) CS374 26 Spring 2017 26 / 58

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Graph Coloring

Observation: If G is colored with k colors then each color class (nodes of same color) form an independent set in G. Thus, G can be partitioned into k independent sets iff G is k-colorable. Graph 2-Coloring can be decided in polynomial time. G is 2-colorable iff G is bipartite!

Chandra Chekuri (UIUC) CS374 26 Spring 2017 26 / 58

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Graph Coloring

Observation: If G is colored with k colors then each color class (nodes of same color) form an independent set in G. Thus, G can be partitioned into k independent sets iff G is k-colorable. Graph 2-Coloring can be decided in polynomial time. G is 2-colorable iff G is bipartite! There is a linear time algorithm to check if G is bipartite using BFS

Chandra Chekuri (UIUC) CS374 26 Spring 2017 26 / 58

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Graph Coloring and Register Allocation

Register Allocation

Assign variables to (at most) k registers such that variables needed at the same time are not assigned to the same register

Interference Graph

Vertices are variables, and there is an edge between two vertices, if the two variables are “live” at the same time.

Observations

[Chaitin] Register allocation problem is equivalent to coloring the interference graph with k colors Moreover, 3-COLOR ≤P k-Register Allocation, for any k ≥ 3

Chandra Chekuri (UIUC) CS374 27 Spring 2017 27 / 58

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Class Room Scheduling

Given n classes and their meeting times, are k rooms sufficient?

Chandra Chekuri (UIUC) CS374 28 Spring 2017 28 / 58

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Class Room Scheduling

Given n classes and their meeting times, are k rooms sufficient? Reduce to Graph k-Coloring problem Create graph G a node vi for each class i an edge between vi and vj if classes i and j conflict

Chandra Chekuri (UIUC) CS374 28 Spring 2017 28 / 58

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Class Room Scheduling

Given n classes and their meeting times, are k rooms sufficient? Reduce to Graph k-Coloring problem Create graph G a node vi for each class i an edge between vi and vj if classes i and j conflict Exercise: G is k-colorable iff k rooms are sufficient

Chandra Chekuri (UIUC) CS374 28 Spring 2017 28 / 58

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Frequency Assignments in Cellular Networks

Cellular telephone systems that use Frequency Division Multiple Access (FDMA) (example: GSM in Europe and Asia and AT&T in USA) Breakup a frequency range [a, b] into disjoint bands of frequencies [a0, b0], [a1, b1], . . . , [ak, bk] Each cell phone tower (simplifying) gets one band Constraint: nearby towers cannot be assigned same band,

  • therwise signals will interference

Chandra Chekuri (UIUC) CS374 29 Spring 2017 29 / 58

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Frequency Assignments in Cellular Networks

Cellular telephone systems that use Frequency Division Multiple Access (FDMA) (example: GSM in Europe and Asia and AT&T in USA) Breakup a frequency range [a, b] into disjoint bands of frequencies [a0, b0], [a1, b1], . . . , [ak, bk] Each cell phone tower (simplifying) gets one band Constraint: nearby towers cannot be assigned same band,

  • therwise signals will interference

Problem: given k bands and some region with n towers, is there a way to assign the bands to avoid interference? Can reduce to k-coloring by creating intereference/conflict graph on towers.

Chandra Chekuri (UIUC) CS374 29 Spring 2017 29 / 58

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3 color this gadget.

You are given three colors: red, green and blue. Can the following graph be three colored in a valid way (assuming that some of the nodes are already colored as indicated). (A) Yes. (B) No.

Chandra Chekuri (UIUC) CS374 30 Spring 2017 30 / 58

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3 color this gadget II

You are given three colors: red, green and blue. Can the following graph be three colored in a valid way (assuming that some of the nodes are already colored as indicated). (A) Yes. (B) No.

Chandra Chekuri (UIUC) CS374 31 Spring 2017 31 / 58

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3-Coloring is NP-Complete

3-Coloring is in NP.

Non-deterministically guess a 3-coloring for each node Check if for each edge (u, v), the color of u is different from that of v.

Hardness: We will show 3-SAT ≤P 3-Coloring.

Chandra Chekuri (UIUC) CS374 32 Spring 2017 32 / 58

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Reduction Idea

Start with 3SAT formula (i.e., 3CNF formula) ϕ with n variables x1, . . . , xn and m clauses C1, . . . , Cm. Create graph Gϕ such that Gϕ is 3-colorable iff ϕ is satisfiable need to establish truth assignment for x1, . . . , xn via colors for some nodes in Gϕ.

Chandra Chekuri (UIUC) CS374 33 Spring 2017 33 / 58

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Reduction Idea

Start with 3SAT formula (i.e., 3CNF formula) ϕ with n variables x1, . . . , xn and m clauses C1, . . . , Cm. Create graph Gϕ such that Gϕ is 3-colorable iff ϕ is satisfiable need to establish truth assignment for x1, . . . , xn via colors for some nodes in Gϕ. create triangle with node True, False, Base

Chandra Chekuri (UIUC) CS374 33 Spring 2017 33 / 58

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Reduction Idea

Start with 3SAT formula (i.e., 3CNF formula) ϕ with n variables x1, . . . , xn and m clauses C1, . . . , Cm. Create graph Gϕ such that Gϕ is 3-colorable iff ϕ is satisfiable need to establish truth assignment for x1, . . . , xn via colors for some nodes in Gϕ. create triangle with node True, False, Base for each variable xi two nodes vi and ¯ vi connected in a triangle with common Base

Chandra Chekuri (UIUC) CS374 33 Spring 2017 33 / 58

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Reduction Idea

Start with 3SAT formula (i.e., 3CNF formula) ϕ with n variables x1, . . . , xn and m clauses C1, . . . , Cm. Create graph Gϕ such that Gϕ is 3-colorable iff ϕ is satisfiable need to establish truth assignment for x1, . . . , xn via colors for some nodes in Gϕ. create triangle with node True, False, Base for each variable xi two nodes vi and ¯ vi connected in a triangle with common Base If graph is 3-colored, either vi or ¯ vi gets the same color as True. Interpret this as a truth assignment to vi

Chandra Chekuri (UIUC) CS374 33 Spring 2017 33 / 58

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Reduction Idea

Start with 3SAT formula (i.e., 3CNF formula) ϕ with n variables x1, . . . , xn and m clauses C1, . . . , Cm. Create graph Gϕ such that Gϕ is 3-colorable iff ϕ is satisfiable need to establish truth assignment for x1, . . . , xn via colors for some nodes in Gϕ. create triangle with node True, False, Base for each variable xi two nodes vi and ¯ vi connected in a triangle with common Base If graph is 3-colored, either vi or ¯ vi gets the same color as True. Interpret this as a truth assignment to vi Need to add constraints to ensure clauses are satisfied (next phase)

Chandra Chekuri (UIUC) CS374 33 Spring 2017 33 / 58

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Figure

v1 v1 v2 v2 vn

vn T F Base

Chandra Chekuri (UIUC) CS374 34 Spring 2017 34 / 58

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Clause Satisfiability Gadget

For each clause Cj = (a ∨ b ∨ c), create a small gadget graph gadget graph connects to nodes corresponding to a, b, c needs to implement OR OR-gadget-graph:

a b c a ∨ b a ∨ b ∨ c

Chandra Chekuri (UIUC) CS374 35 Spring 2017 35 / 58

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SLIDE 63

OR-Gadget Graph

Property: if a, b, c are colored False in a 3-coloring then output node

  • f OR-gadget has to be colored False.

Property: if one of a, b, c is colored True then OR-gadget can be 3-colored such that output node of OR-gadget is colored True.

Chandra Chekuri (UIUC) CS374 36 Spring 2017 36 / 58

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Reduction

create triangle with nodes True, False, Base for each variable xi two nodes vi and ¯ vi connected in a triangle with common Base for each clause Cj = (a ∨ b ∨ c), add OR-gadget graph with input nodes a, b, c and connect output node of gadget to both False and Base

a b c a ∨ b a ∨ b ∨ c T F Base

Chandra Chekuri (UIUC) CS374 37 Spring 2017 37 / 58

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Reduction

a b c a ∨ b a ∨ b ∨ c T F Base

Claim

No legal 3-coloring of above graph (with coloring of nodes T, F, B fixed) in which a, b, c are colored False. If any of a, b, c are colored True then there is a legal 3-coloring of above graph.

Chandra Chekuri (UIUC) CS374 38 Spring 2017 38 / 58

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SLIDE 66

3 coloring of the clause gadget

s a b c w u v r

T

s a b c w u v r

T

s a b c w u v r

T

FFF - BAD FFT FTF

s a b c w u v r

T

s a b c w u v r

T

s a b c w u v r

T

FTT TFF TFT

s a b c w u v r

T

s a b c w u v r

T

TTF TTT

Chandra Chekuri (UIUC) CS374 39 Spring 2017 39 / 58

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SLIDE 67

Reduction Outline

Example

ϕ = (u ∨ ¬v ∨ w) ∧ (v ∨ x ∨ ¬y)

v u ~w y x w ~y ~x ~v ~u F T N

Literals get colour T or F colours have complementary Variable and negation OR−gates Palette

Chandra Chekuri (UIUC) CS374 40 Spring 2017 40 / 58

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Correctness of Reduction

ϕ is satisfiable implies Gϕ is 3-colorable if xi is assigned True, color vi True and ¯ vi False

Chandra Chekuri (UIUC) CS374 41 Spring 2017 41 / 58

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SLIDE 69

Correctness of Reduction

ϕ is satisfiable implies Gϕ is 3-colorable if xi is assigned True, color vi True and ¯ vi False for each clause Cj = (a ∨ b ∨ c) at least one of a, b, c is colored True. OR-gadget for Cj can be 3-colored such that

  • utput is True.

Chandra Chekuri (UIUC) CS374 41 Spring 2017 41 / 58

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SLIDE 70

Correctness of Reduction

ϕ is satisfiable implies Gϕ is 3-colorable if xi is assigned True, color vi True and ¯ vi False for each clause Cj = (a ∨ b ∨ c) at least one of a, b, c is colored True. OR-gadget for Cj can be 3-colored such that

  • utput is True.

Chandra Chekuri (UIUC) CS374 41 Spring 2017 41 / 58

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SLIDE 71

Correctness of Reduction

ϕ is satisfiable implies Gϕ is 3-colorable if xi is assigned True, color vi True and ¯ vi False for each clause Cj = (a ∨ b ∨ c) at least one of a, b, c is colored True. OR-gadget for Cj can be 3-colored such that

  • utput is True.

Gϕ is 3-colorable implies ϕ is satisfiable if vi is colored True then set xi to be True, this is a legal truth assignment

Chandra Chekuri (UIUC) CS374 41 Spring 2017 41 / 58

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SLIDE 72

Correctness of Reduction

ϕ is satisfiable implies Gϕ is 3-colorable if xi is assigned True, color vi True and ¯ vi False for each clause Cj = (a ∨ b ∨ c) at least one of a, b, c is colored True. OR-gadget for Cj can be 3-colored such that

  • utput is True.

Gϕ is 3-colorable implies ϕ is satisfiable if vi is colored True then set xi to be True, this is a legal truth assignment consider any clause Cj = (a ∨ b ∨ c). it cannot be that all a, b, c are False. If so, output of OR-gadget for Cj has to be colored False but output is connected to Base and False!

Chandra Chekuri (UIUC) CS374 41 Spring 2017 41 / 58

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SLIDE 73

Graph generated in reduction...

... from 3SAT to 3COLOR

d X c a b T a b c d F Chandra Chekuri (UIUC) CS374 42 Spring 2017 42 / 58

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SLIDE 74

Part III Circuit SAT

Chandra Chekuri (UIUC) CS374 43 Spring 2017 43 / 58

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Circuits

Definition

A circuit is a directed acyclic graph with

1 ? ? ? Inputs:

1

Input vertices (without incoming edges) labelled with 0, 1 or a distinct variable.

2

Every other vertex is labelled ∨, ∧ or ¬.

3

Single node output vertex with no outgoing edges.

Chandra Chekuri (UIUC) CS374 44 Spring 2017 44 / 58

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SLIDE 76

Circuits

Definition

A circuit is a directed acyclic graph with

1 ? ? ? ∧ ∨ ∨ ¬ ∧ ∧ Inputs:

1

Input vertices (without incoming edges) labelled with 0, 1 or a distinct variable.

2

Every other vertex is labelled ∨, ∧ or ¬.

3

Single node output vertex with no outgoing edges.

Chandra Chekuri (UIUC) CS374 44 Spring 2017 44 / 58

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SLIDE 77

Circuits

Definition

A circuit is a directed acyclic graph with

1 ? ? ? ∧ ∨ ∨ ¬ ∧ ∧ Inputs: Output:

1

Input vertices (without incoming edges) labelled with 0, 1 or a distinct variable.

2

Every other vertex is labelled ∨, ∧ or ¬.

3

Single node output vertex with no outgoing edges.

Chandra Chekuri (UIUC) CS374 44 Spring 2017 44 / 58

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CSAT: Circuit Satisfaction

Definition (Circuit Satisfaction (CSAT).)

Given a circuit as input, is there an assignment to the input variables that causes the output to get value 1?

Chandra Chekuri (UIUC) CS374 45 Spring 2017 45 / 58

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SLIDE 79

CSAT: Circuit Satisfaction

Definition (Circuit Satisfaction (CSAT).)

Given a circuit as input, is there an assignment to the input variables that causes the output to get value 1?

Claim

CSAT is in NP.

1

Certificate: Assignment to input variables.

2

Certifier: Evaluate the value of each gate in a topological sort of DAG and check the output gate value.

Chandra Chekuri (UIUC) CS374 45 Spring 2017 45 / 58

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SLIDE 80

Circuit SAT vs SAT

CNF formulas are a rather restricted form of Boolean formulas. Circuits are a much more powerful (and hence easier) way to express Boolean formulas

Chandra Chekuri (UIUC) CS374 46 Spring 2017 46 / 58

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SLIDE 81

Circuit SAT vs SAT

CNF formulas are a rather restricted form of Boolean formulas. Circuits are a much more powerful (and hence easier) way to express Boolean formulas However they are equivalent in terms of polynomial-time solvability.

Theorem

SAT ≤P 3SAT ≤P CSAT.

Theorem

CSAT ≤P SAT ≤P 3SAT.

Chandra Chekuri (UIUC) CS374 46 Spring 2017 46 / 58

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SLIDE 82

Converting a CNF formula into a Circuit

Given 3CNF formulat ϕ with n variables and m clauses, create a Circuit C. Inputs to C are the n boolean variables x1, x2, . . . , xn Use NOT gate to generate literal ¬xi for each variable xi For each clause (ℓ1 ∨ ℓ2 ∨ ℓ3) use two OR gates to mimic formula Combine the outputs for the clauses using AND gates to obtain the final output

Chandra Chekuri (UIUC) CS374 47 Spring 2017 47 / 58

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SLIDE 83

Example

ϕ =

  • x1 ∨ ∨x3 ∨ x4
  • x1 ∨ ¬x2 ∨ ¬x3
  • ¬x2 ∨ ¬x3 ∨ x4
  • Chandra Chekuri (UIUC)

CS374 48 Spring 2017 48 / 58

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SLIDE 84

Converting a circuit into a CNF formula

Label the nodes

1 ? ? ? Inputs Output:

∧ ∧ ∧ ∨ ∨ ¬

1 ,a ? ,b ? ,c ,d ? ,e Inputs Output: ∧, k ¬, i ∧, j ∧, f ∨, g ∨, h

(A) Input circuit (B) Label the nodes.

Chandra Chekuri (UIUC) CS374 49 Spring 2017 49 / 58

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SLIDE 85

Converting a circuit into a CNF formula

Introduce a variable for each node

1 ,a ? ,b ? ,c ,d ? ,e Inputs Output: ∧, k ¬, i ∧, j ∧, f ∨, g ∨, h 1 ,a ? ,b ? ,c ,d ? ,e Inputs Output: ∧, k ¬, i ∧, j ∧, f ∨, g ∨, h

xk xj xi xf xg xh xa xb xc xd xe

(B) Label the nodes. (C) Introduce var for each node.

Chandra Chekuri (UIUC) CS374 50 Spring 2017 50 / 58

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SLIDE 86

Converting a circuit into a CNF formula

Write a sub-formula for each variable that is true if the var is computed correctly.

1 ,a ? ,b ? ,c ,d ? ,e Inputs Output: ∧, k ¬, i ∧, j ∧, f ∨, g ∨, h

xk xj xi xf xg xh xa xb xc xd xe

xk (Demand a sat’ assignment!) xk = xi ∧ xk xj = xg ∧ xh xi = ¬xf xh = xd ∨ xe xg = xb ∨ xc xf = xa ∧ xb xd = 0 xa = 1 (C) Introduce var for each node. (D) Write a sub-formula for each variable that is true if the var is computed correctly.

Chandra Chekuri (UIUC) CS374 51 Spring 2017 51 / 58

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SLIDE 87

Converting a circuit into a CNF formula

Convert each sub-formula to an equivalent CNF formula

xk xk xk = xi ∧ xj (¬xk ∨ xi) ∧ (¬xk ∨ xj) ∧ (xk ∨ ¬xi ∨ ¬xj) xj = xg ∧ xh (¬xj ∨ xg) ∧ (¬xj ∨ xh) ∧ (xj ∨ ¬xg ∨ ¬xh) xi = ¬xf (xi ∨ xf ) ∧ (¬xi ∨ xf ) xh = xd ∨ xe (xh ∨ ¬xd) ∧ (xh ∨ ¬xe) ∧ (¬xh ∨ xd ∨ xe) xg = xb ∨ xc (xg ∨ ¬xb) ∧ (xg ∨ ¬xc) ∧ (¬xg ∨ xb ∨ xc) xf = xa ∧ xb (¬xf ∨ xa) ∧ (¬xf ∨ xb) ∧ (xf ∨ ¬xa ∨ ¬xb) xd = 0 ¬xd xa = 1 xa

Chandra Chekuri (UIUC) CS374 52 Spring 2017 52 / 58

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SLIDE 88

Converting a circuit into a CNF formula

Take the conjunction of all the CNF sub-formulas

1 ,a ? ,b ? ,c ,d ? ,e Inputs Output: ∧, k ¬, i ∧, j ∧, f ∨, g ∨, h

xk xj xi xf xg xh xa xb xc xd xe

xk ∧ (¬xk ∨ xi) ∧ (¬xk ∨ xj) ∧ (xk ∨ ¬xi ∨ ¬xj) ∧ (¬xj ∨ xg) ∧ (¬xj ∨xh) ∧ (xj ∨¬xg ∨¬xh) ∧ (xi ∨ xf ) ∧ (¬xi ∨ xf ) ∧ (xh ∨ ¬xd) ∧ (xh ∨ ¬xe) ∧ (¬xh ∨ xd ∨ xe) ∧ (xg ∨ ¬xb) ∧ (xg ∨ ¬xc) ∧ (¬xg ∨ xb ∨ xc) ∧ (¬xf ∨ xa) ∧ (¬xf ∨ xb) ∧ (xf ∨¬xa ∨¬xb) ∧ (¬xd)∧xa We got a CNF formula that is satisfiable if and only if the original circuit is satisfiable.

Chandra Chekuri (UIUC) CS374 53 Spring 2017 53 / 58

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SLIDE 89

Reduction: CSAT ≤P SAT

1

For each gate (vertex) v in the circuit, create a variable xv

2

Case ¬: v is labeled ¬ and has one incoming edge from u (so xv = ¬xu). In SAT formula generate, add clauses (xu ∨ xv), (¬xu ∨ ¬xv). Observe that xv = ¬xu is true ⇐ ⇒ (xu ∨ xv) (¬xu ∨ ¬xv) both true.

Chandra Chekuri (UIUC) CS374 54 Spring 2017 54 / 58

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SLIDE 90

Reduction: CSAT ≤P SAT

Continued...

1

Case ∨: So xv = xu ∨ xw. In SAT formula generated, add clauses (xv ∨ ¬xu), (xv ∨ ¬xw), and (¬xv ∨ xu ∨ xw). Again,

  • bserve that
  • xv = xu ∨ xw
  • is true

⇐ ⇒ (xv ∨ ¬xu), (xv ∨ ¬xw), (¬xv ∨ xu ∨ xw) all true.

Chandra Chekuri (UIUC) CS374 55 Spring 2017 55 / 58

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SLIDE 91

Reduction: CSAT ≤P SAT

Continued...

1

Case ∧: So xv = xu ∧ xw. In SAT formula generated, add clauses (¬xv ∨ xu), (¬xv ∨ xw), and (xv ∨ ¬xu ∨ ¬xw). Again observe that xv = xu ∧ xw is true ⇐ ⇒ (¬xv ∨ xu), (¬xv ∨ xw), (xv ∨ ¬xu ∨ ¬xw) all true.

Chandra Chekuri (UIUC) CS374 56 Spring 2017 56 / 58

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SLIDE 92

Reduction: CSAT ≤P SAT

Continued...

1

If v is an input gate with a fixed value then we do the following. If xv = 1 add clause xv. If xv = 0 add clause ¬xv

2

Add the clause xv where v is the variable for the output gate

Chandra Chekuri (UIUC) CS374 57 Spring 2017 57 / 58

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SLIDE 93

Correctness of Reduction

Need to show circuit C is satisfiable iff ϕC is satisfiable ⇒ Consider a satisfying assignment a for C

1

Find values of all gates in C under a

2

Give value of gate v to variable xv; call this assignment a′

3

a′ satisfies ϕC (exercise)

⇐ Consider a satisfying assignment a for ϕC

1

Let a′ be the restriction of a to only the input variables

2

Value of gate v under a′ is the same as value of xv in a

3

Thus, a′ satisfies C

Chandra Chekuri (UIUC) CS374 58 Spring 2017 58 / 58

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SLIDE 94

List of NP-Complete Problems to Remember

Problems

1

SAT

2

3SAT

3

CircuitSAT

4

Independent Set

5

Clique

6

Vertex Cover

7

Hamilton Cycle and Hamilton Path in both directed and undirected graphs

8

3Color and Color

Chandra Chekuri (UIUC) CS374 59 Spring 2017 59 / 58