Flicker: Refresh Power Reduction in DRAM Memories through Critical - PowerPoint PPT Presentation

Flicker: Refresh Power Reduction in DRAM Memories through Critical Data Partitioning Song Liu, Northwestern Univ. Karthik Pattabiraman, MSR Thomas Moscibroda, MSR Benjamin Zorn, MSR

Motivation: Smart-phones Responsiveness is important Smart-phones becoming ubiquitous Can drain DRAM Memory battery even consumes up to 30% when idle of system power

Motivation: DRAM Refresh power error rate The opportunity The cost refresh cycle [s] 64 mSec X sec Where we Where we are today want to be If software is able to tolerate errors, we can lower refresh rates pretty drastically to save power

Flicker: Approach • Critical / non-critical data partitioning Important for Does not application substantially impact correctness crit non-crit app correctness e.g., pointers, key e.g., multimedia data structures data, soft state crit non-crit Flicker DRAM High refresh Low refresh No errors Some errors Mobile applications have substantial amounts of non-critical data 4

Flicker: Implementation Minimal H/W changes: Variation of PASR DRAM Programmer OS Allocator Flicker DRAM High Refresh Rows Low Refresh Rows virtual pages physical pages critical object critical page non-critical object non-critical page 5

Flicker: Contributions • First software technique to intentionally lower hardware reliability for energy savings • Minimal changes to hardware – based on PASR mode in existing DRAMs • No modifications required for legacy applications – incremental deployment • Reduced overall DRAM power by 20-25% with negligible loss of performance ( < 1 %) and reliability across wide range of apps 6

The “Good Enough” Revolution Source: WIRED Magazine (Sep 2009) – Robert Kapps http://www.wired.com/gadgets/miscellaneous/magazine/17-09/ff_goodenough People prefer “cheap and good - enough” over “costly and near - perfect” http://research.microsoft.com/en-us/projects/samurai/