First results of T2K - nd280 Front End Electronics performance with - - PowerPoint PPT Presentation

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First results of T2K - nd280 Front End Electronics performance with GM - APDs Antonin Vacheret for the T2K-UK electronics and photosensors groups 1 Outline T2K and the 280m near detectors overview of the Trip - t Front End Board ( TFB )

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First results of T2K-nd280 Front End Electronics performance with GM-APDs

Antonin Vacheret for the T2K-UK electronics and photosensors groups

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Outline

➡ T2K and the 280m near detectors ➡ overview of the Trip-t Front End Board (TFB) ➡ Measurements with MPPC 100/400 pixels

  • Charge spectra
  • Timestamping
  • Voltage trim functionality tests

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Tokai to Kamioka

➡ 2009 Phase I : θ13, θ23, Δm223

  • J-PARC : 0.75 MW 30 GeV
  • SK-III : 22.5 kT FV, full PMT

coverage

➡ 2015 Phase II : θ13 , δCP ?

  • J-PARC : 4MW 50 GeV
  • HyperK : 1 MT scale

3

Exposure(22.54kTxyear)

Far detector : Super Kamiokande ν beam : J-PARC facility 10 100 1 10-1 10-2 10-3 Phase I Phase II 20% 10% 5%

12 countries, 62 institutions, ~ 350 people

3σ

90% C.L.

sin22θ13 Sensitivity

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

280m near detectors complex

4

36m

3° 2°

SK direction 16m 5m

FGD MRD Neutron shield

~14m

SK

ν beam

ND280 Pit

INGRID SK BEAM ND280 ofg axis P0D :π0 detector Tracker :

  • 2 FGD : Fine grained

scintillator detectors

  • 3 TPCs

Tracker ECal Side Muon ranger detector (in magnet air gaps) UA1 Magnet Left clam P0D ECal INGRID : on axis neutrino flux measurement ND280 : ofg axis beam flux and SuperK backgrounds measurements T2K baseline ν ν ~ 8 m

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Scintillators readout constraints

➡ Magnetic field

  • UA1 magnet will be operated at B = 0.2 T

➡ Low light yield

  • In scintillators sub-systems ~ 10-15 p.e./MIP/cm expected

➡ Very tight space constraints

  • small space for readout

➡ High number of channels

  • ~60000 total

➡ Detector in operation for 5 years

  • Low maintance is desirable

➡ GMAPD is only candidate that met (almost) all requirements

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Scintillators Readout

➡ Scintillator + Wavelength shifting fibre + GMAPD

  • Kuraray Y-11 1 mm diameter WLS fibre

➡ Tight readout space in UA1 magnet ➡ GMAPDs have individual connector ➡ Good coupling crucial to minimise light loss at fibre end

6 5 cm Connector design for P0D/ECAL Scintillator bar readout cut view (ECAL) WLS Fibre Ferrule sensor spring foam connector PCB board Shroud X plane Y plane

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

ND280 Electronics overview

7

SiPM0

TFB0 …

SiPM63 SiPM0

TFB1 …

SiPM63 SiPM0

TFB47 …

SiPM63

… RMM0 TPS

Power distribution Clk & trg data

CTM

Trigger Primitives

MCM

Cosmic trigger Spill trig & # GPS 1Hz/100MHz (Acc. RF) Clk & trg

FPN

Gigabit/ Ethernet

Acronyms: Acronyms: TFB: TFB: TRIP-t front-end board TRIP-t front-end board RMM: RMM: r/o merger module r/o merger module CTM: CTM: global trigger module global trigger module MCM: MCM: master clock module master clock module SCM: SCM: slave clock module slave clock module TPS: TPS: TRIP-t power supply TRIP-t power supply FPN: FPN: front-end proc. node (PC) front-end proc. node (PC)

SCM

Special trigger Clk & trg Gigabit/ Ethernet Gigabit/ Ethernet Clk & trg

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TRIP-t Front end board (front view)

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I2C for

  • ext. temp.

sensors

data in data out 100 MHz trigger in trigger

  • ut

power regulators 2 x dual channel 10 bit ADCs

5V 3V3 2V5 1V2 JTAG JTAG HV switch RJ45 RJ45 16 cm 9cm 12 layers – 6 routing, 6 power/GND

miniature coax connectors for photo-sensors

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TRIP-t Front end board (back)

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FPGA tript tript tript tript

gain splitting and bias components temperature and voltage monitoring 8 x 8 channel HV trim DACs

  • 5V trim range on every channel

HV trim HV trim HV trim HV trim HV trim HV trim HV trim HV trim BGA footprint for PROM

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TRIP-t parameters

➡ 32 synchronous channels ➡ Adjustable Integration window

  • 50 nsec to many musec
  • reset time can also be adjusted, 50 nsec minimum

➡ Adjustable gain

  • saturation at 3000 fC
  • noise < 1fC

➡ Bufger depth 23 timeslices ➡ Timestamp discriminator threshold for each TRIP-t

  • 1 timestamp per channel/integration window

➡ Timestamp generation from 400MHz TDC (FPGA)

  • 2.5 ns resolution

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

J-PARC Spill structure

➡ 8(15) bunches per spill ➡ 4(2) muon lifetime after spill active period (90(80)% active)

  • translates to 50-70% in Michel electron tagging efficiency

11 Spill Structure 8(15) bunches Trip-t Chip time structure Timestamp generation

540 ns 58 ns 540 ns 58 ns 58 ns 2-3.3 s 2-3.3 s (241) ns (241) ns 1 8 3 2

Integration Reset Reset Integration Readout

4.2μs 4.2μs 4.2μs

in spill after spill inter spill delayed signals switch to cosmics/ calibration mode neutrino interactions

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TRIP-t front end

➡ Only pre-amp afgects signal feeding discriminator

  • no fine control (x1 or x4)

➡ discriminator threshold Vth

  • common to all channels on chip

➡ Analogue bias settings

  • gain, Vth, etc
  • programmable via serial interface

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

GMAPD-TFB connection

➡ HVglobal : common to all GMAPD channels on the TFB ➡ HV Trim : 5V individual bias voltage adjustment ➡ HV Trim applied to coax sheath - AC coupled to GRD

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47k 50V, 0402 220pF 50V 0402 330pF 100V 0603 10pF 100V 0603 100pF 100V 0603 51R LV 0603 100nF LV 0402 1k LV, 0402

trip-t

10pF 100V, 0603

HVglobal HVtrim(0-5V) cal test pulse coax sheath not DC coupled to GND photo- sensor

47k 50V, 0402

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Interconnections

➡ Miniature coaxial cable (HRS)

  • stands voltage input up to 100V

➡ min coax connectors on top surface ➡ Gain splitting and bias components

  • n bottom surface

➡ Electric fan-in to TRIP-t inputs on internal layer to avoid pick-up

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TFB Pedestal and noise

15 170 160 150 140 ADC units 120 100 80 60 40 20 ADC sample no. 2.0 1.5 1.0 0.5 0.0 rms ADC units 120 100 80 60 40 20 ADC sample no. average pedestal value for all 4 chips small systematic chip-to-chip differences 1 p.e. ~ 10 ADC units (for 5x105 photo-sensor gain) noise ~ 1 ADC unit small difference in noise between high and low gain channels

Pedestals Noise 1st trip-t 2nd 3rd 4th

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TFB linearity

➡ 64 high (red) and low (blue) channels (4 TRIP-t's, 16 hi/lo channels per chip ➡ Behavior ~ identical to single TRIP-t chip ➡ 5% channel spread attributed to gain setting component tolerances ➡ Calibration required to correct non- linearities

16 1000 800 600 400 200 ADC units 40 30 20 10 external injected charge [pC] 800 600 400 200 ADC units 40 30 20 10 external injected charge [pC] 1 10 100 1000 ADC units

4 6

0.1

2 4 6

1

2 4 6

10

2 4

external injected charge [pC] pedestal subtracted

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TFB Discriminator settings

17 discriminator turn-on curves for all 16 channels from 1 trip-t measurement procedure: inject fixed external charge (200 triggers) sweep discriminator thresh. voltage Vth count no. of times discriminator fires (no. of timestamps) 3 separate measurements for 1.5, 2.5 and 3.5 p.e. equivalent external injected charge (assuming 5x105 electrons/p.e.) channel-to-channel spread better than that previously measured on single chip test board possibly attributable to shielded layout of fan-in tracking between input connectors and trip-t I/Ps? 1.5 p.e. 2.5 p.e. 3.5 p.e. 200 150 100 50 number of timestamps [out of 200] 230 220 210 200 190 180 170 160 150 140 Vth setting ~ 0.2 p.e.

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Measurements using GMAPD

➡ Motivation :

  • Check behavior with T2K GMAPD candidates
  • Identify problems with prototype
  • Start developing large scale sensor QA methods using the TFB

➡ TFB prototypes received beginning of June

  • Currently under tests
  • TFB firmware well advanced, almost all functionalities being

implemented

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Test setup

➡ MPPC 400 and 100 pixels (S1036211XXX-C)

  • Temperature T=25ºC
  • 400 pixels : G ~ 7x105 DCR ~ 400kHz
  • 100 pixels : G ~ 1x106 DCR ~ 500kHz

➡ NANOLED source, 1 ns pulse width ➡ TFB settings

  • 10 integrations window : 250 ns
  • reset period : 100 ns

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100V source T Controller

LED source 475 nm ND Filter wheel Iris Peltier heat pump GMAPD Mini coax. TFB RMM emulator PC TFB protocol Standard protocol (USB)

250 ns 100 ns 150 ns TFB cycles LED flash Pulse generator

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

MPPC 400pix ADC spectrum

20 T = 25 ºC Vbias = 69.80 V Gain ~ 7 x 105

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

MPPC 400pix low LED ~ 4-5pe

21

lin lin

T = 25ºC , V = 69.81V HiGain LoGain

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

MPPC 400pix medium LED ~ 50pe

22 HiGain LoGain

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

MPPC 100pix low LED ~ 4-5pe

23 HiGain LoGain

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

MPPC 100pix high LED ~ 15pe

24 HiGain LoGain

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Efgect of large signals

➡ Large signals induce drop in voltage line :

  • Total charge integrated decreases

in following timeslice

  • gain drops by 10% for 100 p.e.

signal

  • May affect timestamping

➡ HV line recovery time is in the order of few μs

  • Gain drop can be corrected
  • HV line resistor values could be

adjusted but signal in next time- slice after very large one will be rare

25 Pedestal mean value HiGain channel 10 timeslice HPK-S1036211050-C gain values from ADC spectrum, 2nd Timeslice

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Time Stamping

➡ Timestamp value is correlated to total charge integrated ➡ Discriminator timestamp reliable only when Q >> Qvth ➡ What performance to expect with real GMAPD pulse integration ?

26 Vth 1 Vth 2 Vth 3 Sensor raw pulse simulation pre-amp integration

25 20 15 10 5 440 400 360 320 250 200 150 100 50 300 200 100 600 400 200 800 600 400 200

number of timestamps (out of 1000 triggers) timestamp value [nsec] 2.5 p.e. 2.25 p.e. 2.0 p.e. 1.75 p.e. 1.5 p.e. threshold at 1.5 pe inject fixed calibrated charge

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Discriminator Time walk with MPPC I

27

➡ HPK-S1036211050-C (400 pixels) ➡ Threshold Vth = 1.5 p.e. ➡ Acquired 10000 triggers for 4 difgerent LED intensity ( 0 to ~40 p.e.)

  • Readout ADC data and

timestamp

  • Cut on 2nd timeslice
  • Correlation shows sum of

all 4 measurements for Ntimestamp > 0 ➡ Time resolution ~ 1 ns for signal > 10 p.e. ➡ Very promising timing performance with GMAPD response

Vth ~ 1.5 p.e.

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Discriminator Time walk with MPPC II

➡ HPK-S1036211100-C (100 pixels) ➡ Threshold Vth = 3.5 p.e. ➡ Same measurement as before but Vth set according to increase in gain ➡ Good time resolution but larger spread of signal due to long pixel decay time (~ 100 ns) and possibly afterpulse

28 Vth ~ 2.5 p.e.

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Time Resolution

➡ Preliminary results suggests that a time resolution of 1 ns or better is achievable

  • study in progress

➡ Ultimately time performance will depend on light yield and threshold setting for each sub-system

  • Need full detection chain test with cosmic muons
  • Optimum threshold setting depends on dark count rate and light yield

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Voltage scans

➡ Motivation :

  • Sensor parameters measurements (QA) using ADC spectrum
  • gain
  • dark count rate,
  • pixel crosstalk, afterpulse
  • T2K run : inter-calibration and correction for gain variations

➡ TFB has 10bit DAC : +5V, 20 mV voltage resolution

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Voltage scan

➡ 80 mV steps, pedestal run

  • 4x more points possible with DAC

➡ Gain extracted using peak to peak method ➡ Dark count rate estimation using ratio : 0.5p.e./Nevent ➡ Study voltage scans in more details to ensure good accuracy of voltage control

31 T = 24 ºC G = 5.105*(x - 67.2) kHz

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Summary and schedule

➡ Early study of the TFB prototype shows very good performances with MPPC devices

  • good signal charge and time resolution

➡ TFB functionalities under tests

  • Voltage scan using HV trim works

➡ TFB final modifications before end 2007 ➡ Production of TFB and Back end board Apr 2008 ➡ GMAPD delivery and tests planned in early 2008 for most nd280 sub-systems ➡ INGRID commissioning Jan 2009 ➡ T2K starts Apr 2009 ➡ nd280 commissioning Oct 2009 ➡ nd280 data taking Nov 2009

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Chip to Chip variations

➡ Discriminator threshold

34 230 220 210 200 190 180 170 160 150 140 number of timestamps Trip A Trip B Trip C Trip D repeat previous measurement for

  • ther 3 trip-t’s (2.5 p.e. Qin only)

spread ~ same for all 4 chips small systematic chip-chip offset, but can program Vth individually for each chip anyway Vth setting

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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

TFB channel crosstalk

35 data from one trip-t, injecting external charge on

  • ne channel

16 high gain chans 16 low gain chans 2.5 pC 5 pC 10 pC 20 pC 30 pC 40 pC 1000 800 600 400 200 ADC units pedestals 2.5 pC 5 pC 10 pC 20 pC 30 pC 40 pC 180 170 160 150 180 170 160 150 180 170 160 150 180 170 160 150 180 170 160 150 expand vertical scale for 500 p.e. signal (40 pC) get ~ 1 p.e. signal in neighbouring hign gain channels, and ~1 p.e. depression of pedestals in

  • ther high gain channels (~ 0.2 % effects)
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Antonin Vacheret, Imperial College London PD07, June 25-27 2007 Kobe, Japan

Programmable Integration/Reset

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3.0 2.0 1.0 0.0 volts 1600 1400 1200 1000 800 600 400 time [nsec] 3.0 2.0 1.0 0.0 volts 1600 1400 1200 1000 800 600 400 time [nsec] 3.0 2.0 1.0 0.0 volts 1600 1400 1200 1000 800 600 400 time [nsec] 3.0 2.0 1.0 0.0 volts 1600 1400 1200 1000 800 600 400 time [nsec] 3.0 2.0 1.0 0.0 volts 1600 1400 1200 1000 800 600 400 time [nsec]

preamp integration/reset time independently programmable integration period 200 ns 250 ns 300 ns reset period 100 ns 200 ns 50 ns reset