Exploiting Half-Wits: Smarter Storage for Low-Power Devices - - PowerPoint PPT Presentation

Exploiting Half-Wits: Smarter Storage for Low-Power Devices

Mastooreh (Negin) Salajegheh, Yue Wang Kevin Fu, Andrew Jiang, Erik Learned-Miller

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Mastooreh Salajegheh, USENIX FAST ’11

2 figure: treehugger.com

Mastooreh Salajegheh, USENIX FAST ’11

2 figure: treehugger.com

Mastooreh Salajegheh, USENIX FAST ’11

Storage on Embedded Devices

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Mastooreh Salajegheh, USENIX FAST ’11

Storage on Embedded Devices

>$10 billion

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Mastooreh Salajegheh, USENIX FAST ’11

Storage on Embedded Devices

>$10 billion

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Mastooreh Salajegheh, USENIX FAST ’11

Storage on Embedded Devices

>$10 billion

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Mastooreh Salajegheh, USENIX FAST ’11

On-chip Flash

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Mastooreh Salajegheh, USENIX FAST ’11

Microcontroller with 8KB Embedded Flash Memory

On-chip Flash

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Mastooreh Salajegheh, USENIX FAST ’11

Microcontroller with 8KB Embedded Flash Memory

On-chip Flash

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2.2 V vs. 4.5 V

Mastooreh Salajegheh, USENIX FAST ’11

CPU Flash 4.5 V

Ideal

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Energy ∝Workload 2.2 V

Mastooreh Salajegheh, USENIX FAST ’11

Energy ∝ Worst case CPU Flash 4.5 V

Ideal Actual

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CPU Flash 4.5 V Energy ∝Workload 2.2 V

Mastooreh Salajegheh, USENIX FAST ’11

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Goal of this work

• To reduce the wasted energy

consumption for embedded storage.

Mastooreh Salajegheh, USENIX FAST ’11

Contribution

• Software for using flash memory at low

voltage

• Quantifying the impact on reliability
• Measuring the energy savings

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Mastooreh Salajegheh, USENIX FAST ’11

State of the Art

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• Pick the highest voltage...Excessive power

Mastooreh Salajegheh, USENIX FAST ’11

State of the Art

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• Pick the highest voltage...Excessive power
• Add hardware...$$

Mastooreh Salajegheh, USENIX FAST ’11

State of the Art

I can’t remember a thing

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• Pick the highest voltage...Excessive power
• Add hardware...$$
• Don’t use flash memory...Ugh!

[Sample:08]

Mastooreh Salajegheh, USENIX FAST ’11

State of the Art

I can’t remember a thing

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• Pick the highest voltage...Excessive power
• Add hardware...$$
• Don’t use flash memory...Ugh!

[Sample:08]

50 100 200 300 2 4 Time (ms)

Voltage

[Ransford: ASPLOS11]

Mastooreh Salajegheh, USENIX FAST ’11

Our Approach

Savings: Low-voltage

Write to flash memory at low voltage.

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Mastooreh Salajegheh, USENIX FAST ’11

Our Approach

Cost: Errors

How hard is it to correct the errors?

Savings: Low-voltage

Write to flash memory at low voltage.

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Mastooreh Salajegheh, USENIX FAST ’11

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Write once bits (Wits)

figure: http://arcweb.archives.gov

[Rivest:82]

Mastooreh Salajegheh, USENIX FAST ’11

Partial Failure at Low Voltage

• Example:

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1111 1111

Initialized:

Mastooreh Salajegheh, USENIX FAST ’11

Partial Failure at Low Voltage

• Example:

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1111 1100

Input:

1111 1111

Initialized:

Mastooreh Salajegheh, USENIX FAST ’11

Partial Failure at Low Voltage

• Example:

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1111 1100

Input:

1111 1111

Initialized:

Mastooreh Salajegheh, USENIX FAST ’11

Partial Failure at Low Voltage

• Example:

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1111 1100 1111 1101

Input: Result:

1111 1111

Initialized:

Mastooreh Salajegheh, USENIX FAST ’11

Partial Failure at Low Voltage

• Example:

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1111 1100 1111 1101

Input: Result:

1111 1111

Initialized:

Error

Mastooreh Salajegheh, USENIX FAST ’11

Transitions at low voltage

• 1→0 might fail with P≥0.
• 1→1 never fails (P=0).

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Z

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[Klove:95]

Mastooreh Salajegheh, USENIX FAST ’11

What might influence the error rate

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Mastooreh Salajegheh, USENIX FAST ’11

What might influence the error rate

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✓Operating voltage level

Mastooreh Salajegheh, USENIX FAST ’11

What might influence the error rate

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✓Operating voltage level ✓Hamming weight of data

Mastooreh Salajegheh, USENIX FAST ’11

What might influence the error rate

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✓Operating voltage level ✓Hamming weight of data ✓Wear-out history

Mastooreh Salajegheh, USENIX FAST ’11

What might influence the error rate

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✓Operating voltage level ✓Hamming weight of data ✓Wear-out history

• Neighbor cells

Mastooreh Salajegheh, USENIX FAST ’11

What might influence the error rate

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✓Operating voltage level ✓Hamming weight of data ✓Wear-out history

• Neighbor cells
• Permutation of 0s

Mastooreh Salajegheh, USENIX FAST ’11

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Mastooreh Salajegheh, USENIX FAST ’11

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Test Platform

Mastooreh Salajegheh, USENIX FAST ’11

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Monitor Test Platform

Mastooreh Salajegheh, USENIX FAST ’11

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Monitor Test Platform Voltage Supply

Mastooreh Salajegheh, USENIX FAST ’11

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JTAG Monitor Test Platform Voltage Supply

Mastooreh Salajegheh, USENIX FAST ’11

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20 40 60 80 100 1.80 1.82 1.84 1.86 1.88 1.90 1.92

Error rate (%) Operating Voltage (V)

M C U

• a

Mastooreh Salajegheh, USENIX FAST ’11

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20 40 60 80 100 1.80 1.82 1.84 1.86 1.88 1.90 1.92

Error rate (%) Operating Voltage (V)

MCU-A M C U

• a

T w

• c

h i p s

• f

t h e s a m e m

• d

e l

Mastooreh Salajegheh, USENIX FAST ’11

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20 40 60 80 100 1.80 1.82 1.84 1.86 1.88 1.90 1.92

Error rate (%)

MCU-A M C U

• a

MCU-B MCU-b

Operating Voltage (V)

Mastooreh Salajegheh, USENIX FAST ’11

Data Hamming Weight

1 2 3 4 5 6 7 8 50 100 Hamming weight Error rate(%)

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Mastooreh Salajegheh, USENIX FAST ’11

Data Hamming Weight

1 2 3 4 5 6 7 8 50 100 Hamming weight Error rate(%)

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The heavier the better.

Mastooreh Salajegheh, USENIX FAST ’11

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Voltage = 1.850 V

20 40 60 80 100 12 rows (memory length)

Error (%)

128 bits (memory width)

Mastooreh Salajegheh, USENIX FAST ’11

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More often used

Voltage = 1.850 V

20 40 60 80 100 12 rows (memory length)

Error (%)

128 bits (memory width)

Mastooreh Salajegheh, USENIX FAST ’11

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Accumulative Behavior

figure: steynian.wordpress.com

Mastooreh Salajegheh, USENIX FAST ’11

Design of a Low-voltage Storage

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Mastooreh Salajegheh, USENIX FAST ’11

Modeling Flash Memory

• A set of cells
• Cell state:
• Initial state:
• Update: set a subset of to 0
• Once then a write cannot
• Write Once Bits: Wits

< c1, ..., cn > ci ∈ {0, 1} ∀i, ci = 1 < c1, ..., cn > n ci ← 1 ci = 0

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Mastooreh Salajegheh, USENIX FAST ’11

At low voltage:

• might fail and remains . [Pavan:97]
• There might not be enough charge stored

in a cell to represent a 0: Half-Wits

Modeling Flash Memory

ci ← 0 ci 1

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Mastooreh Salajegheh, USENIX FAST ’11

Design Goals

• Energy consumption
• Error rate
• Delay

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Minimize:

Mastooreh Salajegheh, USENIX FAST ’11

Proposed Techniques

• 1. In-place writes
• 2. Multiple-place writes
• 3. ReedSolomon-Berger Codes

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Mastooreh Salajegheh, USENIX FAST ’11

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Initialization: 1

Negative Logic

}

Cell

Mastooreh Salajegheh, USENIX FAST ’11

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Initialization: 1 Written: 0

Negative Logic

☺

Charge

}

Cell

Mastooreh Salajegheh, USENIX FAST ’11

• 1. In-place writes

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• Repeatedly attempt a write to the same location.

Mastooreh Salajegheh, USENIX FAST ’11

• 1. In-place writes

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1

• Repeatedly attempt a write to the same location.
• Example: One bit over time

Mastooreh Salajegheh, USENIX FAST ’11

• 1. In-place writes

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1

• Repeatedly attempt a write to the same location.
• Example: One bit over time

1→0

Mastooreh Salajegheh, USENIX FAST ’11

• 1. In-place writes

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1 1→0

• Repeatedly attempt a write to the same location.
• Example: One bit over time

1→0

Mastooreh Salajegheh, USENIX FAST ’11

• 1. In-place writes

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1 1→0

• Repeatedly attempt a write to the same location.
• Example: One bit over time

1→0

Mastooreh Salajegheh, USENIX FAST ’11

In-place writes

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25 50 75 100 1 2 3 4 5 6 7

Error rate (%)

Ineffective Effective

# sequential in-place writes

Mastooreh Salajegheh, USENIX FAST ’11

In-place writes

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25 50 75 100 1 2 3 4 5 6 7

Error rate (%)

Ineffective Effective

# sequential in-place writes

1.87 V

Mastooreh Salajegheh, USENIX FAST ’11

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25 50 75 100 1 2 3 4 5 6 7

Error rate (%)

1.87 1.86 1.88 1.89 1.90

In-place writes

# sequential in-place writes

Mastooreh Salajegheh, USENIX FAST ’11

Cell 1

• 2. Multiple-place writes
• Encoding: Write to more

than one location.

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1 1 Cell 2

Mastooreh Salajegheh, USENIX FAST ’11

Cell 1

• 2. Multiple-place writes
• Encoding: Write to more

than one location.

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1 1 1 Cell 2

Mastooreh Salajegheh, USENIX FAST ’11

Cell 1

• 2. Multiple-place writes
• Encoding: Write to more

than one location.

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• Decoding: AND all
• f the values at

read time. 1 1 1

&

Cell 2

Mastooreh Salajegheh, USENIX FAST ’11

Cell 1

• 2. Multiple-place writes
• Encoding: Write to more

than one location.

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• Decoding: AND all
• f the values at

read time. 1 1 1 0 Cell 2

Mastooreh Salajegheh, USENIX FAST ’11

Multiple-place writes

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25 50 75 100 1 2 3 4 5 6 7

Error rate (%) # places to store data

1.86 1 . 8 8 1.87 1 . 8 9 1 . 9

Mastooreh Salajegheh, USENIX FAST ’11

Design Goals

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✔

• Energy consumption
• Delay
• Error rate

Minimize:

Mastooreh Salajegheh, USENIX FAST ’11

Comparison at 1.9 V

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Store: Accelerometer trace Repeating the writes 2 times/ locations

Mastooreh Salajegheh, USENIX FAST ’11

Comparison at 1.9 V

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Method Time (ms) Energy (μJ) In-place 15.43 38 Multiple-place 16.85 40

Store: Accelerometer trace Repeating the writes 2 times/ locations

Mastooreh Salajegheh, USENIX FAST ’11

Comparison at 1.9 V

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Method Time (ms) Energy (μJ) In-place 15.43 38 Multiple-place 16.85 40

Store: Accelerometer trace Repeating the writes 2 times/ locations

Mastooreh Salajegheh, USENIX FAST ’11

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Micro-benchmarks:

Standard approach at high voltage In-Place writes at low voltage

vs

Mastooreh Salajegheh, USENIX FAST ’11

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Retrieve Store Normalized energy consumption RC5

in-place 1.8 V in-place 1.9 V Standard 2.2 V Standard 3.0 V

[Rivest:94]

Half-wits Vs. Wits

Mastooreh Salajegheh, USENIX FAST ’11

RC5

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Store Normalized energy consumption

in-place 1.8 V in-place 1.9 V Standard 2.2 V Standard 3.0 V

Retrieve

Half-wits Vs. Wits

Mastooreh Salajegheh, USENIX FAST ’11

Retrieve RC5

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Normalized energy consumption

in-place 1.8 V in-place 1.9 V Standard 2.2 V Standard 3.0 V

Store

Half-wits Vs. Wits

Mastooreh Salajegheh, USENIX FAST ’11

Retrieve RC5

Half-wits Vs. Wits

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Normalized energy consumption

in-place 1.8 V in-place 1.9 V Standard 2.2 V Standard 3.0 V

Store

Mastooreh Salajegheh, USENIX FAST ’11

Hypothesis

For CPU-bound workloads:

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Energy of high-voltage system Energy of low-voltage system

<

Mastooreh Salajegheh, USENIX FAST ’11

Monitoring application

• Read 256 bytes of accelerometer data
• Aggregate data: Min, Max, Mean, Std. dev.
• Write the aggregation of 256 bytes of data

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Mastooreh Salajegheh, USENIX FAST ’11

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• 34%

Energy Savings

In-place Writes

Mastooreh Salajegheh, USENIX FAST ’11

Monitoring application

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Method In-place 1.8 v In-place 1.9 V Standard 2.2 V Standard 3.0 V Energy (μJ) 270 300 410 760

Mastooreh Salajegheh, USENIX FAST ’11

Monitoring application

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Method In-place 1.8 v In-place 1.9 V Standard 2.2 V Standard 3.0 V Energy (μJ) 270 300 410 760

Mastooreh Salajegheh, USENIX FAST ’11

Monitoring application

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Method In-place 1.8 v In-place 1.9 V Standard 2.2 V Standard 3.0 V Energy (μJ) 270 300 410 760 In-place 1.9 V

Mastooreh Salajegheh, USENIX FAST ’11

Further improvements

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• 1. Sign-bits and storing the complement
• 2. Memory mapping-table

[Papirla:09]

Mastooreh Salajegheh, USENIX FAST ’11

Summary: Exploiting Half-Wits

• In-place writes on half-wits is an effective

way to reduce wasted energy.

• Microcontrollers can work at a lower

voltage and get more work done with the same amount of energy.

• The digital abstractions pay a higher price

than necessary to provide reliability.

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