Effective Linear Programming-Based Placement Techniques Sherief - - PowerPoint PPT Presentation

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Effective Linear Programming-Based Placement Techniques Sherief - - PowerPoint PPT Presentation

Effective Linear Programming-Based Placement Techniques Sherief Reda Sherief Reda Amit Chowdhary Amit Chowdhary UC San Diego UC San Diego Intel Corporation Intel Corporation Outline Outline Motivation Motivation Modeling of


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SLIDE 1

Effective Linear Programming-Based Placement Techniques

Sherief Reda Sherief Reda

UC San Diego UC San Diego

Amit Chowdhary Amit Chowdhary

Intel Corporation Intel Corporation

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SLIDE 2

Outline Outline

  • Motivation

Motivation

  • Modeling of cell spreading

Modeling of cell spreading

  • Linear programming (LP)

Linear programming (LP)-

  • based placer

based placer

  • Applications of LP

Applications of LP-

  • based placer

based placer

  • Experimental results

Experimental results

  • Conclusions

Conclusions

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SLIDE 3

Motivation Motivation

  • Linear programming has been shown to be effective

Linear programming has been shown to be effective in modeling timing objective during placement in modeling timing objective during placement

– – Static timing can be modeled as linear constraints Static timing can be modeled as linear constraints using the notion of differential timing [DAC 2005] using the notion of differential timing [DAC 2005]

  • Linear programming can effectively model wirelength

Linear programming can effectively model wirelength as half as half-

  • perimeter wirelength (HPWL)

perimeter wirelength (HPWL)

  • Cell spreading not modeled in linear programming

Cell spreading not modeled in linear programming yet yet

– – LP has been restricted to incremental placement LP has been restricted to incremental placement

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SLIDE 4

Main Contribution Main Contribution

  • In this paper, we model cell spreading using linear

In this paper, we model cell spreading using linear constraints constraints

  • Designed a global placer based on linear

Designed a global placer based on linear programming programming

– – Efficient modeling of timing and wirelength Efficient modeling of timing and wirelength – – Uses relative placement constraints to spread cells Uses relative placement constraints to spread cells gradually gradually

  • Our LP

Our LP-

  • based placement approach can be used as

based placement approach can be used as

– – Global placer Global placer – – Whitespace allocator (WSA) Whitespace allocator (WSA)

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SLIDE 5

LP-based Placement Approach LP-based Placement Approach

  • Place cells using an ideal or exact HPWL model of

Place cells using an ideal or exact HPWL model of wirelength wirelength

  • Use this initial placement to establish a

Use this initial placement to establish a relative relative

  • rdering
  • rdering of cells
  • f cells
  • Transform

Transform relative order relative order of cells into

  • f cells into linear

linear constraints constraints

– – Solve the corresponding LP problem to spread cells Solve the corresponding LP problem to spread cells while maintaining relative order while maintaining relative order

  • Iterate till cells are spread out

Iterate till cells are spread out

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SLIDE 6

LP-based Placement Approach LP-based Placement Approach

Placement after iteration 1

Placement after iteration 3 Legalized placement Placement after iteration 2 Placement after iteration 4

Initial WL-optimal placement

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SLIDE 7

Modeling of wirelength Modeling of wirelength

  • leftx

leftx, , rightx rightx, , lowery lowery and and uppery uppery variables defined for every net variables defined for every net

  • HPWL model of wirelength used

HPWL model of wirelength used

  • For every cell at location

For every cell at location ( (x x, ,y y) ) connected to net connected to net

  • Length of this net is

Length of this net is

lowery uppery Net leftx rightx

y uppery y lowery x rightx x leftx ≥ ≤ ≥ ≤

) ( ) ( lowery uppery leftx rightx l − + − =

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SLIDE 8

Lower bound on wirelength Lower bound on wirelength

  • Length of a net has a lower bound based on the area of

Length of a net has a lower bound based on the area of cells connected to it cells connected to it

  • Lower bound on each net spreads out cells

Lower bound on each net spreads out cells – – Helps in defining relative order of cells Helps in defining relative order of cells

  • Overall wirelength objective is

Overall wirelength objective is

∑ ≥

u u

Area l

∑ =

netsl

HPWL

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SLIDE 9

Modeling of timing Modeling of timing

  • Various aspects of static timing analysis can be

Various aspects of static timing analysis can be formulated as linear constraints of cell placements formulated as linear constraints of cell placements [DAC2005] [DAC2005]

– – Delay and transition time for cells Delay and transition time for cells – – Delay and transition time for nets Delay and transition time for nets – – Propagated arrival times Propagated arrival times – – Slack at cell pins Slack at cell pins – – Timing metrics Timing metrics

  • worst negative slack WNS

worst negative slack WNS

  • total negative slack TNS

total negative slack TNS

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SLIDE 10

Defining relative order Defining relative order

For each cell v, define four sets corresponding to the cells

to the left, right, upper, and below v – Quadratic time and space complexity

Reduce space complexity to linear using transitivity

– Still quadratic time

We use fast heuristic methods that capture a good amount

  • f the relative order relationships

– Q-adjacency graph – Delaunay triangulation

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SLIDE 11

Q-adjacency Graph Q-adjacency Graph

  • Simple Idea: Establish an adjacency between each cell and

its closest cell in each of the four quadrant

Complexity is O(M.logM + k.M), where k is a constant that

depends on the input placement

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SLIDE 12

Delaunay Triangulation Delaunay Triangulation

  • Capture adjacency using Delaunay triangulation

Voronoi diagram Delaunay triangulation (dual of the Voronoi diagram)

  • Voronoi diagram
  • Partitioning of a plane with n

points into convex polygons such that each polygon contains exactly one generating point and every point in a given polygon is closer to its generating point than to any other point

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SLIDE 13

Example of Delaunay and Q-Adjacency Example of Delaunay and Q-Adjacency

  • We use relative order from Q-Adjacency as well as

Delaunay triangulation

DEL Q-ADJ + DEL Q-ADJ

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SLIDE 14

LP Modeling of Relative Order LP Modeling of Relative Order

u v u v u v

  • 2. if u and v do not overlap

make sure a non-overlap does not turn into an overlap

  • 1. if u and v overlap in the current placement

then next separation = current separation + minimum additional separation to remove the overlap and make sure u and v relative positions stay the same make sure the amount of overlap reduces

For each adjacency {u, v}:

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SLIDE 15

LP-Based Placement Techniques LP-Based Placement Techniques

Our LP-based placement approach can be used in several ways 1. Wirelength-driven global placement 2. Whitespace allocation 3. Timing- and wirelength-driven global placement

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SLIDE 16
  • 1. Wirelength-driven Global Placement
  • 1. Wirelength-driven Global Placement

Relative Placement MidX - Spreading Legalization Detailed Placement Final Placement Unplaced circuit

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SLIDE 17

Benchmark statistics Benchmark statistics

16491 16491 18217 18217 14780 14780 18592 18592 16056 16056 1308 1308 7673 7673 11819 11819 20935 20935

# cells # cells

16473 16473 9219 9219 9271 9271 15073 15073 8404 8404 2214 2214 7522 7522 7851 7851 9708 9708

# I O Pads # I O Pads

54% 54% 17817 17817 292 292

WFUB09 WFUB09

52% 52% 1935 1935 146 146

WFUB04 WFUB04

49% 49% 20002 20002 363 363

WFUB05 WFUB05

27% 27% 15960 15960 554 554

WFUB07 WFUB07

55% 55% 12780 12780 356 356

WFUB02 WFUB02

36% 36% 8542 8542 587 587

WFUB03 WFUB03

43% 43% 19525 19525 507 507

WFUB08 WFUB08

41% 41% 53% 53%

WS% WS%

22737 22737 539 539

WFUB06 WFUB06

21901 21901 270 270

WFUB01 WFUB01 # nets # nets # DH cells # DH cells Circuit Circuit

  • Circuits chosen from a recent microprocessor
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SLIDE 18

Comparison with Other Placers Comparison with Other Placers

Compared results with other placers

  • Capo 9.3 (UMich)
  • Better of FengShui 2.6 and 5.1 (SUNY)
  • APlace 2.0 (UCSD)
  • Better of mPL 4.1 and 5.0 (UCLA)

All placements were measured using the same HPWL calculator

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SLIDE 19

Results of comparison Results of comparison

Average% Average% WFUB09 WFUB09 WFUB08 WFUB08 WFUB07 WFUB07 WFUB06 WFUB06 WFUB05 WFUB05 WFUB04 WFUB04 WFUB03 WFUB03 WFUB02 WFUB02 WFUB01 WFUB01 Circuit Circuit

  • 1.34%

1.34%

110 110 802 802 652 652 118 118 107 107 fail fail fail fail 539 539 882 882

APlace APlace 2.0 2.0 0.00% 0.00%

111 111 804 804 693 693 114 114 106 106 94 94 326 326 574 574 888 888

Our Our Placer Placer

117 117 190 190 106 106 128 128 131 131 93 93 110 110 136 136 109 109 699 699 765 765 673 673 651 651 883 883 562 562 349 349 456 456 325 325 872 872 891 891 821 821

0.71% 0.71%

123 123 927 927

Capo Capo 9.3 9.3 10.90% 10.90% 32.05% 32.05%

119 119 117 117 1053 1053 fail fail

mPL mPL 5.0 5.0 FengShui FengShui 5.1 5.1

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SLIDE 20

Comparison of Placers Comparison of Placers

  • 5

5 10 15 20 25 30 35 Average HPWL % Diff MidX Capo9.3 FengShui5.1 APlace2.0 mPL5.0

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SLIDE 21

Placements of different placers Placements of different placers

FengShui5.1 HPWL = 891 HPWL = 881 mPL5.0 Capo9.3 HPWL = 823 HPWL = 804 Our Placement APlace2.0 HPWL = 802

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SLIDE 22
  • 2. Whitespace Allocation
  • 2. Whitespace Allocation

In an existing legal placement, we redistribute white space to optimize wirelength

Global Placement + Legalization MidX – Whitespace Allocation Legalization Detailed Placement Final Placement Unplaced circuit

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SLIDE 23

Whitespace Allocation: Example Whitespace Allocation: Example

Input global placement: HPWL = 9.43 After MidX and legalization: HPWL = 8.81 After MidX: HPWL = 8.76

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SLIDE 24
  • 3. Timing-driven global placement
  • 3. Timing-driven global placement

Timing-optimal Relaxed Placement MidXT - Spreading Legalization Detailed Placement Final Placement Unplaced circuit

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SLIDE 25

Timing-driven global placement Timing-driven global placement

  • Start with a timing-optimal relaxed placement obtained

using our differential timing-based placer [DAC 2005]

  • Identify timing critical cells from a static timer
  • Spread cells using MidXT with a combined objective of
  • Minimize total wirelength of all nets
  • Minimize total displacement of all timing-critical cells
  • We are working on integrating the static timing

constraints in MidXT placer

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SLIDE 26

Timing-driven placement: Example Timing-driven placement: Example

Input Placement: TNS = -13.99 Relaxed placement: TNS = -8.82 After MidXT: TNS = -9.40 After legalization: TNS = -10.34

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SLIDE 27

Conclusions Conclusions

  • Extended LP

Extended LP-

  • based placement approach to

based placement approach to model cell spreading model cell spreading

– – Relative order amongst adjacent cells are Relative order amongst adjacent cells are transformed into linear constraints transformed into linear constraints

  • Presented a powerful LP

Presented a powerful LP-

  • based global placer

based global placer

– – Gradually spreads cells while maintaining Gradually spreads cells while maintaining relative order relative order – – Benchmarked against academic placers Benchmarked against academic placers – – Models timing and wirelength very accurately Models timing and wirelength very accurately