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Effect of BDD Optim ization Effect of BDD Optim ization on Synthesis of Reversible and Quantum Logic d Q L i Robert Wille, Rolf Drechsler , Institute of Computer Science University of Bremen, Germany University of Bremen, Germany {

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SLIDE 1

Effect of BDD Optim ization Effect of BDD Optim ization

  • n Synthesis of Reversible

d Q L i and Quantum Logic

Robert Wille, Rolf Drechsler ,

Institute of Computer Science University of Bremen, Germany University of Bremen, Germany { rwille,drechsle} @informatik.uni-bremen.de

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SLIDE 2

Outline

  • Motivation and Background
  • Motivation and Background
  • BDD-based Synthesis
  • Exploiting BDD-optimization

– Shared Nodes – Complement Edges Complement Edges – Reordering

  • Experimental Results

Conclusions

2

  • Conclusions
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SLIDE 3

Reversible Logic

  • Applications in
  • Applications in

– Quantum Computing Low Power Design – Low-Power Design – Optical Computing DNA C ti – DNA Computing – …

1 1 1 1 Toffoli gate 1

3

Toffoli gate

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SLIDE 4

Quantum Logic

  • Is inherently reversible
  • Signals represented by qubits
  • Signals represented by qubits

(i.e. non-Boolean values)

  • Value of each qubit is restricted to 0 1 V or V

NOT P f i i

  • Value of each qubit is restricted to 0, 1, V0 or, V1

1

  • NOT:

Peforms inversion

  • CNOT: controled inversion
  • V:

‘square root’ of NOT 1 1 1 1 V 1 1 1 V

  • V:

square root of NOT

  • V+ :

inverse of V

V V

1 V1

V+

1 V0

4

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SLIDE 5

Synthesis Problem

Gi R f ti t T k Fi d t k

  • Given: Rev. function to

be synthesized

  • Task: Find network

(i.e. a cascade of gates)

  • Previous Work:

No fanouts, no feedback

  • Often rely on truth table (or similar) description

Only applicable to small functions

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SLIDE 6

Outline

  • Motivation and Background
  • Motivation and Background
  • BDD-based Synthesis
  • Exploiting BDD-optimization

– Shared Nodes – Complement Edges Complement Edges – Reordering

  • Experimental Results

Conclusions

6

  • Conclusions
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SLIDE 7

Binary Decision Diagram s ( BDDs)

  • Data structure for efficient representation and

manipulation of Boolean functions

  • Rooted, directed, acyclic

graph, which consists of g ap ,

  • s s s o

decision nodes and two terminal nodes (leafs)

  • Each decision node is

labeled by a Boolean variable and has two child nodes (low and high)

7

nodes (low and high)

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SLIDE 8

BDD-based Synthesis # 1

  • 1. Build BDD for function f using existing techniques
  • 2. Substitute each BDD node by a cascade of gates

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SLIDE 9

BDD-based Synthesis # 2

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SLIDE 10

Exam ple ( XOR function)

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SLIDE 11

BDD-based Synthesis # 3

  • Linear worst case behavior regarding run-time

g g and space requirements

  • Resulting circuits are bounded by BDD size

BDD optimization can be exploited

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SLIDE 12

Outline

  • Motivation and Background
  • Motivation and Background
  • BDD-based Synthesis
  • Exploiting BDD-optimization

– Shared Nodes – Complement Edges Complement Edges – Reordering

  • Experimental Results

Conclusions

12

  • Conclusions
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SLIDE 13

Shared Nodes

  • Used to represent a sub formula more than once
  • Used to represent a sub-formula more than once
  • Need to preserve node values

(requires additional line) (requires additional line)

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SLIDE 14

Com plem ent Edges

  • Allows to represent a function as well as its

p negation by a single node only

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SLIDE 15

Reordering

Can be directly y applied (no further (no further adjustments)

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SLIDE 16

Outline

  • Motivation and Background
  • Motivation and Background
  • BDD-based Synthesis
  • Exploiting BDD-optimization

– Shared Nodes – Complement Edges Complement Edges – Reordering

  • Experimental Results

Conclusions

16

  • Conclusions
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SLIDE 17

Experim ental Setup

  • Implemented on the top of CUDD
  • Benchmarks from RevLib (www revlib org) and
  • Benchmarks from RevLib (www.revlib.org) and

LGSynth package

  • Objectives:

– Circuit lines Circuit lines – Number of Toffoli gates – Quantum Cost Quantum Cost – Run-time (often negligible)

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SLIDE 18

Results ( selected)

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SLIDE 19

RMRLS G t t l @ TCAD 2006

Com parison to Previous W ork

  • RMRLS: Gupta et al. @ TCAD, 2006
  • RMS: Maslov et al. @ TODAES, 2007
  • Significant run-time for both RMRLS and RMS
  • Most of the functions aborted after 500 CPU

19

seconds

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SLIDE 20

Outline

  • Motivation and Background
  • Motivation and Background
  • BDD-based Synthesis
  • Exploiting BDD-optimization

– Shared Nodes – Complement Edges Complement Edges – Reordering

  • Experimental Results

Conclusions

20

  • Conclusions
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SLIDE 21

Conclusions

  • BDD-based synthesis has been introduced

y

  • Effect of BDD optimization

Effect of BDD optimization – Shared Nodes: Always yields better results – Compl. Edges: Better results in most cases

  • Compl. Edges: Better results in most cases

– Orderings: Best results with exact ordering, but Sifting also yields good circuits g y g

  • Comparison to Previous Work:

Comparison to Previous Work: – Larger functions can be handled – Significant improvements in quantum cost

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Significant improvements in quantum cost – More circuit lines needed

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SLIDE 22

Effect of BDD Optim ization Effect of BDD Optim ization

  • n Synthesis of Reversible

d Q L i and Quantum Logic

Robert Wille, Rolf Drechsler ,

Institute of Computer Science University of Bremen, Germany University of Bremen, Germany { rwille,drechsle} @informatik.uni-bremen.de