SLIDE 39 Comparison with the State of the Art
- 55.09%
- 76.23 %
- 92-91%
- 92.91%
- 95.80%
- 95.80%
200 400 600 800 1000 1200 1400 1600
[3] - 65 nm [4] - 40 nm [5] - 65 nm this work - 65 nm this work mF - 65 nm this work - 28 nm this work mF - 28 nm
dE per pixel [pJ] High (8/7 tap luma, 4 tap chroma) Medium (5 tap luma, 3 tap chroma) Low (3 tap luma, 2 tap chroma)
this work: 4 luma and 3 chroma parallel filters running at 150 MHz UHD@60 fps
[3] V. Afonso et al., “Low cost and high throughput FME interpolation for the HEVC emerging video coding standard,” Proc. of the IEEE LASCAS Conf., 2013. [4] E. Kalali et al., “A reconfigurable HEVC sub pixel interpolation hardware,” Proc. of the IEEE ICCE Conf., 2013. [5] C. M. Diniz et al., “A reconfigurable hardware architecture for fractional pixel interpolation in high efficiency video coding,” IEEE Comput.-Aided Des. Integr. Circuits Syst., vol. 34, no. 2, pp. 238–251, 2015.
- 6%
- 17%
- 14%
- 22%
- 23%
- 29%
- 24%
- 36%
50 100 150
this work - 65 nm this work mF
this work - 28 nm this work mF
Tiziana Fanni, University of Cagliari - Dynamic Trade-Off Management for CPS