DM9000A & 9010 10/ 100 Mbps Single Chip Ethernet Controller - - PowerPoint PPT Presentation

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1 DM9000A & 9010 10/ 100 Mbps Single Chip Ethernet Controller with General Processor Interface By: Charles Tsai DAVICOM NCD Confidential DAVICOM NCD Confidential 2004/8/9 2 Application 1. Embedded System 1. Embedded System 2. Media

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DAVICOM NCD Confidential DAVICOM NCD Confidential 1

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DM9000A & 9010

10/ 100 Mbps Single Chip Ethernet Controller with General Processor Interface

By: Charles Tsai

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DAVICOM NCD Confidential DAVICOM NCD Confidential 2

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1. Embedded System
1. Embedded System
2. Media Converter
2. Media Converter
3. Digital Home
3. Digital Home

Application

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Embedded System Embedded System

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Media Converter Media Converter

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Digital Home Digital Home

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Application List

You can use DM9000A/9010

to design a Embedded System
to design a Media Converter
to build in Digital Home

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Easy Use

Auto MDIX automatic detect cable connection type MDI/MDIX (straight through/cross over)

RX + /- RX+/- to RJ45 TX + /- TX+/- to RJ45

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High Performance

48 MHz (DM9000)

100 MHz (DM9000A/9010)

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Enhance Internet Performance

IP/TCP/UDP checksum generation and checking

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High flexible

Up to 23 GPIO pins

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Compact Layout

Small Package for compact Embedded System Design.

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Improve Transmit Throughput

Early Tx: Transmit before write transmit data end. RISC CPU

DM9000A / 9010

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Single Voltage

Easy to design in Embedded System

3.3V to 2.5V Regulator 3.3V Single Voltage

DM9000A / 9010

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DM9000, 9000A & 9010 Comparison List

1: 1 transformers only when Auto MDIX Enable 1: 1 transformers only when Auto MDIX Enable

Yes

Selectable TX drivers for 1:1 or 1.25:1 transformers for additional power reduction Build in 3.3V to 2.5V regulator Build in 3.3V to 2.5V regulator

none

Regulator Supports up to 23 GPIO pins Supports 6 GPIO pins Supports 4 GPIO pins GPIO pins Supports early Tx Supports early Tx No Supports early Tx

Yes No Yes

MII and reverses MII interface Byte/word/Dword Byte/word Byte/word/Dword Processor interface

Up to 100 MHz 20 / 50 /100 MHz 48 MHz System clock

generation and checking generation and checking

IP/TCP/UDP checksum with auto-MDIX 10/100M transceiver with auto-MDIX 10/100M transceiver

Yes

Integrated 10/100M transceiver

0.25um 0.25um 0.35um Process 100 pin LQFP 48 pinLQFP 100 pin LQFP Pin count DM9010 DM9000A DM9000 Feature

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Features

■ Integrated 10/100M transceiver with auto-MDIX ■ System clock up to 100 MHz ■ IP/TCP/UDP checksum generation and checking ■ Up to 23 GPIO pins ■ MII and reverses MII interface ■ Supports early Tx ■ Build in 3.3V to 2.5V regulator ■ Processor interface: Byte/word/Dword

f I/O command to internal memory data operation

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Features

■ Supports back pressure mode for half-duplex mode flow control ■ IEEE802.3x flow control for full-duplex mode ■ Supports wakeup frame, link status change and magic packet events for remote wake up ■ Integrated 4K Dword SRAM ■ Supports automatically load vendor ID and product ID from EEPROM ■ Optional EEPROM configuration ■ Very low power consumption mode: Power reduced mode (cable detection) Power down mode Selectable TX drivers for 1:1 or 1.25:1 transformers ■ Compatible with 3.3V and 5.0V tolerant I/O

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Architecture

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Advantage

Good Performance Good Noise Inhibition Low Power Consumption Small Package Size Fully support design-in customers Offer competitive price.