Data AcQuisition for the CALICE engineering prototype of the Analog - - PowerPoint PPT Presentation

Data AcQuisition for the CALICE engineering prototype of the Analog Hadronic Calorimeter for the International Linear Collider.

DPG Spring Meeting 2016

• A. Irles

DPG Spring Meeting 2016 Hamburg 29.02.2016

First and Last Name | Title of Presentation | Date | Page 2

Outline of the talk

> The AHCAL engineering prototype. > DAQ hardware, chain of devices. > Readout & data organization > Event Building > Common DAQ & running with EUDAQ as high level DAQ software > Plans and prospects

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 3

The AHCAL engineering prototype

> Scalable prototype to real International Linear Detector, one of the two detectors planned for the ILC → see talk by ... > High granularity calorimeter to optimize the energy reconstruction through the Particle Flow approach → see talk by .... Challenging data management.

• Autotriger mode (see next slides)

> Not traditional cooling approach: Particle Flow requires minimum non-active material.

• Power Pulsing approach → take profit of the specific bunch train structure of the ILC

to reduce active time of the electronics → see talk by ...

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 4

The AHCAL engineering prototype

> Scintillator tiles (3x3x0.3 cm3) +SiPMs > SPIROC ASIC (designed by Omega group)

• 36 channels
• Autotrigger (signal must pass a threshold)
• 16 analogue memory cells
• Optional Trigger validation (unvalidated events are

discarded): only in beam test mode

• Runs until 16 memory cells are full, then it needs long

time to convert and readout (~10 ms)

> Base unit: HBU

• 4 ASICs, 144 channels, 36x36 cm2
• Scalability: 6 HBU in row (called “slab”)
• Up to 3 slabs read out by single HDMI cable
• DAQ Interface boards: DIF, Calib, Power

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 5

DAQ hardware: chain of devices

> Clock and Control Card (CCC)

• Provides master clock
• Starts and stops the acquisition according to the

spill level and readiness of all ASICs

• Distributes trigger validation

> Link Data Aggregator (LDA)

• Packet collecting
• Packet processing (decoding, merging)
• Send the packets over TCP/IP to DAQ PC

> Detector InterFace (DIF)

• Controls the ASICs (voltages, acq. state)
• Collects data from all ASICs on HBU
• Sends the data to LDA

> ASIC (SPIROC, Omega group)

• Reads out 36 SiPMs
• Has 16 memory channels for ADC and TDC

CCC LDA DIF PC ASIC

… Up to 8 LDAs ... Up to 96 DIFs … Up to 72 SPIROCs 36 SiPMs ... Up to 96 DIFs ... Up to 96 DIFs Trigger Spill Data

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 6

DAQ hardware: chain of devices

CCC Wing LDA Modules (ASIC+SiPMs) and DAQ interfaces (DIF, Calibration and Power Boards)

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 7

> SPIROC operates either:

• ILC mode (200 ns clock period, 337 ns)
• Testbeam mode (4 µs clock period)

> SPIROC internally counts clock cycles with 12 bit counter (Bunch crossing ID, BxID) > For low beam rates, it might happen to have overrunning counter. Reset of the counter in 16 ms (TB mode) or 0.8 ms (ILC mode)

• For lower rates than 60 Hz (TB mode) or 1.2 kHz (ILCmode) we would need to:

a) force readout after 16/0.8 ms reducing the data taking eff. b) deal with BxID numbers not uniquely defined

> Next chip generation will provide a 16 bit counter > Synchronous in all layers, reset during start

Readout

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 8

> Whenever 1 channel triggers (autotrigger), all 36 channels are stored in the analogue memory cells (at the end of the BxID latest)

• Often noise;
• Sometimes a miss of an event (if one occurs at the beginning of the BxID and other at

the end in the same channel)

> Acquisition continuous until all memory cells are filled. Then BUSY signal is set → the detector goes blind up to ~50 ms due to conversion and slow readout

• Unpredictable time between readout cycles → make challenging the synchronization

with other detectors

> We count readout cycles, not “events” → next slide

Readout

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 9

> TPC stream. One readout = all packets with same ROC. > Packets (up to 2.4 kB)

• LDA header (length, readout cycle number, LDA id, port number, flags)
• RAW ASIC data (up to 16 BxIDs, 16x TDC+ADC x 36 Channels)

> Packets come out-of-order (data occupancy) > ASICs are readout in a given BxID if it has a hit in one of its own channels

Data organization

L1 A1 L1 A2 L1 A3 L1 A4 L2 A1 L2 A2 L2 A3 L2 A4 L3 A1 L3 A2 L3 A3 L3 A4 L3 A1 ROC+1 Readout cycle: Mcell: BxID: 2 1 6 2 7 3 9 4 ... ADC+TDC: 16*36*2*2 Bytes Mcell: BxID: 2 1 5 2 9 3 ... ADC+TDC: 16*36*2*2 Bytes Mcell: BxID: 2 1 3 2 6 3 8 5 9 ADC+TDC: 16*36*2*2 Bytes 4 ... noise Layer 2, ASIC 1 Layer 1, ASIC 1 Layer 1, ASIC 2 (missing BxID 6)

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 10

The AHCAL: auto trigger mode & event building

> Autotrigger mode. > Event building is done afterwards (can be done near-online) in two steps:

• 1) We sort events by BXID in each readout cycle.
• 2) We get rid out of backgrounds by requiring the

events to occur at the same time frame than real hits... how?

> Currently, we use an external trigger to timestamp events offline (coincidence of two scintillators):

• We fed the scintillators coincidence into a

specific channels called T0.

T0 channels > Need to introduce external trigger signals (i.e. coincidence of scintillator signals) in

• ur DAQ: use a Beam InterFace (BIF)

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 11

EUDAQ: towards ILC common test beams

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

> EUDAQ is a DAQ framework modular and portable:

• Originally developed for pixel telescope in

the ILC targeted EUDET initiative

• Fresh push by the AIDA2020 project

> Central Run Control

• Commands and status

> Producers (hardware dependent)

• Configure hardware, readout the data and

send it to the data collector.

> Data collector

• Receives all the data streams from the

produced s and combines them into a single stream (EUDAQ 1.X)

> Easy and flexible conversion of the raw

• utput to other formats (i.e. LCIO)

First and Last Name | Title of Presentation | Date | Page 12

> First time with different ILC calorimeters running together (Nov-Dic 2014). Using EUDAQ1.X as high level DAQ software:

• Each detector uses its own software

(Labview, etc) for configuration and setup.

• EUDAQ sends the START/STOP

commands collects the two streams of data and merge both in one.

• Online conversion to LCIO.

> The syncronization between both detectors is challenging.

• SiECAL CCC was slaved by the AHCAL

CCC.

EUDAQ: towards ILC common test beams

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 13

> Online monitoring (Data Quality)

• We are currently using ascii files written by Labview to construct control

histograms → to be done within the EUDAQ framework using LCIO files (AIDA2020 WP5) > We are currently working in the development of a new BIF to timestamp events and act as master clock for combined testbeams.

• Based on the AIDA mini-TLU hardware
• Firmware modified at DESY

> DAQ interfaces adaptation for Power pulsing tests.

Plans and prospects

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 14

Backup

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 15

The International Linear Collider (ILC).

> International Linear Collider (ILC):

• e+e- collider
• Based on superconducting RF cavities
• Length of 31 Km
• Gradient: 32 MV/m
• Energy 250-500 GeV (upgradable to 1TeV)
• Beam rate: 5 Hz between bunch trains
• Luminosities ~ 10-34 cm-2 s-1
• Two detectors (ILD/SID): pull-push concept

Damping Rings e- bunch compressor e+ bunch compressor Detectors e- source e+ source

> Lepton-lepton collisions:

• Well defined initial state (no PDFs)
• Well known interaction energy.
• No underlying event, pile-up

e-e+ → HZ, Z → 2 leptons (ILD simulation) Higgs candidate decaying to 4 electrons (ATLAS 2012))

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 16

ILC physics: precision measurements with heavy bosons.

> Precision physics in the Higgs sector, and with heavy bosons:

• The detectors should be able to resolve hadronic heavy boson

decays

• A 3-4% jet energy resolution is needed for 2.6-2.3 W/Z separation
• Roughly: factor 2 better than LEP resolution and factor 3 better

than LHC resolution

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 17

Particle Flow.

> A typical jet is formed by:

• 60% charged hadrons, 30% photons (mainly from pions) and 10% of neutral hadrons
• Jets measurement inherits the intrinsically poor performance of traditional hadronic calorimetry

> Classical calorimeters approach:

• a= stochastic term (~50-100%) and b the constant term (few percent)

> The Particle Flow approach: use the best information in the detector to measure particle energies

• Energy resolution is enhanced with PFA
• Needs high granularity calorimeters to maximize the capabilities of the pattern recognision algorithms (i.e.

PandoraPFA)

• The identification of the different contributions cannot be always done unambiguously (confusion)

> Particle flow-like algorithms were applied at DELPHI (LEP) with ~ and, more recently, by CMS.

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 18

Usage of mini-TLU

> Used as timestamping device in slave mode

• Modified firmware based on revision 245
• Receives 40 MHz clock + shutter (using AHCAL

fast commands)

> Very simple independent readout via python script

• Next step: write a EUDAQ BIF producer using

current TLU producer capabilities.

> Correlation: (currently) offline using readout cycle number > AHCAL BIF can be used for other detectors (if detectors use 40 MHz clocking structure)

CCC LDA DIF PC

… Up to 8 LDAs Trigger Spill

BIF

beam triggers

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016

First and Last Name | Title of Presentation | Date | Page 19

Usage of mini-TLU

> Is possible to use TLU as master-CCC

• Operation closer to TLU original purpose
• Interface: mini-HDMI (4x lvds, clk, fastcmds, trigger,

busy)

• Later: incorporate the CCC in TLU/Master-CCC as

an IP core (?)

> Challenge: combine detectors running at 50 and 40 MHz clock

LDA DIF PC

… Up to 8 LDAs

Master CCC

beam triggers ... Up to 96 DIFs

CCC

Spill

Irles, A. | Hamburg, DPG Spring Meeting | 29th February 2016