CPSC 121: Models of Computation 2017S Building & Designing - - PowerPoint PPT Presentation

CPSC 121: Models of Computation 2017S

Building & Designing Sequential Circuits Meghan Allen, based on notes by Steve Wolfman, Patrice Belleville and others

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Outline

• Prereqs, Learning Goals, and Quiz Notes
• Problems and Discussion

– A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs?

• Next Lecture Notes

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Learning Goals: Pre-Class

We are mostly departing from the readings to talk about a new kind of circuit on our way to a full computer: sequential circuits. The pre-class goals are to be able to:

– Trace the operation of a deterministic finite-state automaton (represented as a diagram) on an input, including indicating whether the DFA accepts or rejects the input. – Deduce the language accepted by a simple DFA after working through multiple example inputs.

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Learning Goals: In-Class

By the end of this unit, you should be able to:

– Translate a DFA to a corresponding sequential circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions. – Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!). – Explain how and why each part of the resulting circuit works.

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Where We Are in The Big Stories

Theory How do we model computational systems? Now: With our powerful modelling language (pred. logic), we can prove things like universality

• f NOR gates for

combinational circuits. Our new model (DFAs) are sort

• f full computers.

Hardware How do we build devices to compute? Now: Learning to build a new kind of circuit with memory that will be the key new feature we need to build full- blown computers! (Something you’ve seen in lab from a new angle.)

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Outline

• Prereqs, Learning Goals, and Quiz Notes
• Problems and Discussion

– A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs?

• Next Lecture Notes

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Problem: Push-Button Light Switch

Problem: Design a circuit to control a light so that the light changes state any time its “push- button” switch is pressed.

(Like the light switches in some buildings on campus: Press and release, and the light changes state. Press and release again, and it changes again.)

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?

A Light Switch “DFA”

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light

• ff

light

• n

pressed pressed This Deterministic Finite Automaton (DFA) isn’t really about accepting/rejecting; its current state is the state of the light. ?

Problem: Light Switch

Problem: Design a circuit to control a light so that the light

changes state any time its “push-button” switch is pressed.

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?

Identifying inputs/outputs: consider these possible inputs and outputs: Input: the button was pressed or the button is down Output: the light is shining or the light changed states Which are most useful for this problem?

• a. pressed and shining
• b. pressed and changed
• c. down and shining
• d. down and changed
• e. None of these

COMPARE TO: Lecture 2’s Light Switch

Problem: Design a circuit to control a light so that the light changes state any time its switch is flipped.

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Identifying inputs/outputs: consider these possible inputs and outputs: Input: the switch flipped or the switch is up Output: the light is shining or the light changed states Which are most useful for this problem?

• a. flipped and shining
• b. flipped and changed
• c. up and shining
• d. up and changed
• e. None of these

?

Outline

• Prereqs, Learning Goals, and !Quiz Notes
• Problems and Discussion

– A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs?

• Next Lecture Notes

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Departures from Combinational Circuits

MEMORY: We need to “remember” the light’s state. EVENTS: We need to act on a button push rather than in response to an input value.

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Problem: How Do We Remember?

We want a circuit that:

• Sometimes… remembers its current state.
• Other times… loads a new state to remember.

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Sounds like a choice. What circuit element do we have for modelling choices?

Worked Problem: “Muxy Memory”

How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1.

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1

• utput

(remember) ??? new data control

We use “0” and “1” because that’s how MUXes are usually labelled.

Worked Problem: Muxy Memory

How do we use a mux to store a bit of memory? We choose to remember on a control value of 0 and to load a new state on a 1.

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1

• utput (Q)
• ld output (Q’)

new data (D) control (G) This violates our basic combinational constraint: no cycles.

Truth Table for “Muxy Memory”

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Fill in the MM’s truth table:

G D Q' 1 1 1 1 1 1 1 1 1 1 1 1 a. b. c. d. e. Q 1 1 1 1 Q 1 1 1 1 Q 1 1 X X 1 Q 1 1 1 1 None

• f

these

Worked Problem: Truth Table for “Muxy Memory”

Worked Problem: Write a truth table for the MM:

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G D Q' Q 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Like a “normal” mux table, but what happens when Q'  Q?

Worked Problem: Truth Table for “Muxy Memory”

Worked Problem: Write a truth table for the MM:

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G D Q' Q 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Q' “takes on” Q’s value at the “next step”.

“D Latch” Symbol + Semantics

We call a “muxy memory” a “D latch”. When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D.

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1

• utput (Q)
• ld output (Q’)

new data (D) control (G)

D Latch Symbol + Semantics

When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D.

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1

• utput (Q)
• ld output (Q’)

new data (D) control (G)

D Latch Symbol + Semantics

When G is 0, the latch maintains its memory. When G is 1, the latch loads a new value from D.

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• utput (Q)

new data (D) control (G) D G Q

Hold On!!

Why does the D Latch have two inputs and one output when the mux inside has THREE inputs and one output?

• a. The D Latch is broken as is; it should have three inputs.
• b. A circuit can always ignore one of its inputs.

c. One of the inputs is always true.

• d. One of the inputs is always false.
• e. None of these (but the D Latch is not broken as is).

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DON’T PANIC!

Using the D Latch for Circuits with Memory

Problem: What goes in the cloud? What do we send into G?

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D G Q Combinational Circuit to calculate next state input ?? We assume we just want Q as the output.

Using the D Latch for Our Light Switch

Problem: What do we send into G?

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D G Q no (0 bit) input

• utput

?? current light state

• a. T if the button is down, F if it’s up.
• b. T if the button is up, F if it’s down.
• c. Neither of these.

A Timing Problem: We Need EVENTS!

Problem: What do we send into G?

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D G Q

• utput

“pulse” when button is pressed current light state button pressed As long as the button is down, D flows to Q flows through the NOT gate and back to D... which is bad!

A Timing Problem, Metaphor

(from MIT 6.004, Fall 2002)

What’s wrong with this tollbooth?

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P.S. Call this a “bar”, not a “gate”,

• r we’ll tie ourselves in (k)nots.

A Timing Solution, Metaphor

(from MIT 6.004, Fall 2002)

Is this one OK?

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A Timing Problem

Problem: What do we send into G?

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D G Q

• utput

“pulse” when button is pressed current light state button pressed As long as the button is down, D flows to Q flows through the NOT gate and back to D... which is bad!

A Timing Solution (Almost)

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L

D G Q

• utput

button pressed

R

D G Q Never raise both “bars” at the same time.

A Timing Solution

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• utput

?? The two latches are never enabled at the same time (except for the moment needed for the NOT gate on the left to compute, which is so short that no “cars” get through).

L

D G Q

R

D G Q

A Timing Solution

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• utput

button pressed button press signal

L

D G Q

R

D G Q

Button/Clock is LO (unpressed)

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• utput

LO 1 1 1

We’re assuming the circuit has been set up and is “running normally”. Right now, the light is off (i.e., the output of the right latch is 0).

L

D G Q

R

D G Q

Button goes HI (is pressed)

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• utput

HI 1 1 1 1 This stuff is processing a new signal.

L

D G Q

R

D G Q

Propagating signal.. left NOT, right latch

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• utput

HI 1 1 1 1 This stuff is processing a new signal.

L

D G Q

R

D G Q

Propagating signal.. right NOT (steady state)

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• utput

HI 1 1 1

Why doesn’t the left latch update? a. Its D input is 0. b. Its G input is 0. c. Its Q output is 1. d. It should update!

L

D G Q

R

D G Q

Button goes LO (released)

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• utput

LO 1 1 This stuff is processing a new signal.

L

D G Q

R

D G Q

Propagating signal.. left NOT

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• utput

LO 1 1 1 This stuff is processing a new signal.

L

D G Q

R

D G Q

Propagating signal.. left latch (steady state)

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• utput

LO 1 1 And, we’re done with one cycle. How does this compare to our initial state?

L

D G Q

R

D G Q

Master/Slave D Flip-Flop Symbol + Semantics

When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.

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• utput

(Q) new data (D) control

• r

“clock” signal (CLK) D G Q D G Q

Master/Slave D Flip-Flop Symbol + Semantics

When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.

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• utput

(Q) new data (D) control

• r

“clock” signal (CLK) D G Q D G Q

Master/Slave D Flip-Flop Symbol + Semantics

When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.

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• utput

(Q) new data (D) control

• r

“clock” signal (CLK) D G Q D G Q

Master/Slave D Flip-Flop Symbol + Semantics

When CLK goes from 0 (low) to 1 (high), the flip-flop loads a new value from D. Otherwise, it maintains its current value.

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new data clock signal D Q

• utput

We rearranged the clock and D inputs and the output to match Logisim. Below we use a slightly different looking flip-flop.

Why Abstract?

Logisim (and real circuits) have lots of flip-flops that all behave very similarly:

– D flip-flops, – T flip-flops, – J-K flip-flops, – and S-R flip-flops.

They have slightly different implementations… and one could imagine brilliant new designs that are radically different inside. Abstraction allows us to build a good design at a high-level without worrying about the details.

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Plus… it means you only need to learn about D flip-flops’ guts. The others are similar enough so we can just take the abstraction for granted.

Outline

• Prereqs, Learning Goals, and !Quiz Notes
• Problems and Discussion

– A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs?

• Next Lecture Notes

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How Do Computers Execute Programs?

• High-level languages (Java/BSL) are translated

into low-level machine language

• A machine language program is a list of

instructions in a representation scheme close to “plain” binary (e.g., 4 bits for the type of instruction, 4 bits for what part of the computer the result goes to, etc.)

• Each instruction has a (barely) human-readable

version

• After it’s done with an instruction, the computer

(usually) executes the next instruction in the list

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Simplified Example (sum of 1..n)

(1) sum  0 (2) is n = 0? (3) if the answer was yes, go to (7) (4) sum  sum + n (5) n  n - 1 (6) go to (2) (7) halt

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If the computer executed all instructions in

• rder, there’d be no loops or recursion!

Fortunately, “branch” instructions (like (3)) tell the computer to go elsewhere.

Simplified Example, Complicated Execution

(1) sum  0 (2) is n = 0? (3) if the answer was yes, go to (7) (4) sum  sum + n (5) n  n - 1 (6) go to (2) (7) halt

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To run faster, the computer starts executing

• ne instruction even before it finishes the last.

But then what does it do with (3)? Does it execute (4) or (7)?

Branch Prediction Machine

To pre-execute a “branch”, the computer guesses which instruction comes next. Here’s one reasonable guess: If the last branch was “taken” (like going to (7) from (3)), take the next. If it was “not taken” (like going to (4) from (3)), don’t take the next.

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Why? In recursion, how often do we hit the base case vs. the recursive case?

Implementing the Branch Predictor (First Pass)

Here’s the corresponding DFA. (Instead of accept/reject, we care about the current state.)

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yes no taken not taken taken not taken

Experiments show it generally works well to add “inertia” so that it takes two “wrong guesses” to change the prediction…

taken  the last branch was taken not taken  the last branch was not taken yes  we predict the next branch will be taken no  we predict the next branch will be not taken

Implementing the Branch Predictor (Final Version)

Here’s a version that takes two wrong guesses in a row to admit it’s wrong: Can we build a branch prediction circuit?

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YES! yes? no? NO! not taken taken not taken taken not taken taken taken not taken

Abstract Template for a DFA Circuit

Each time the clock “ticks” move from one state to the next.

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input clock compute next state store current state

Template for a DFA Circuit

Each time the clock “ticks” move from one state to the next.

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D Q Combinational circuit to calculate next state/output input CLK Each of these lines (except the clock) may carry multiple bits; the D flip-flop may be several flip-flops to store several bits.

How to Implement a DFA: Slightly Harder

(1) Number the states and figure out b: the number of bits needed to store the state number. (2) Lay out b D flip-flops. Together, their memory is the state as a binary number. (3) Build a combinational circuit that determines the next state given the input and the current state. (4) Use the next state as the new state of the flip-flops.

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How to Implement a DFA: Slightly Easier MUX Solution

(1) Number the states and figure out b: the number of bits needed to store the state number. (2) Lay out b D flip-flops. Together, their memory is the state as a binary number. (3) For each state, build a combinational circuit that determines the next state given the input. (4) Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used! (5) Use the MUX’s output as the new state of the flip-flops.

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With a separate circuit for each state, they’re often very simple!

Implementing the Predictor Step 1

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YES! 3 yes? 2 no? 1 NO! not taken taken not taken taken not taken taken taken not taken

What is b (the number of 1-bit flip-flops needed to represent the state)? a. 0, no memory needed b. 1 c. 2 d. 3 e. None of these

As always, we use numbers to represent the inputs: taken = 1 not taken = 0

Just Truth Tables...

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Current State input New state 1 1 1 1 1 1 1 1 1 1 1 1 1

YES! 3 yes? 2 no? 1 NO! not taken taken not taken taken not taken take taken not taken

What’s in this row?

• a. 0 0
• b. 0 1
• c. 1 0
• d. 1 1
• e. None of these.

Reminder: not taken = 0 taken = 1

Just Truth Tables...

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Current State input New state 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

YES! 3 yes? 2 no? 1 NO! not taken taken not taken taken not taken take taken not taken

Reminder: not taken = 0 taken = 1

Implementing the Predictor: Step 3

We always use this pattern. In this case, we need two flip-flops.

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D Q Combinational circuit to calculate next state/output input CLK D Q Let’s switch to Logisim schematics...

???

Implementing the Predictor: Step 3

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D Q ?? input CLK D Q

sleft sright

Implementing the Predictor: Step 3

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???

sleft sright input

Implementing the Predictor: Step 5 (easier than 4!)

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The MUX “trick” here is much like in the ALU from lab!

sleft sright input

Implementing the Predictor: Step 4

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input sleft sright In state number 0, what should be the new value of sleft? Hint: look at the DFA, not at the circuit! a. input b. ~input c. 1 d. e. None of these.

Implementing the Predictor: Step 4

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input In state number 1, what’s the new value of sleft? a. input b. ~input c. 1 d. e. None of these. sleft sright

Implementing the Predictor: Step 4

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input In state number 2, what’s the new value of sleft? a. input b. ~input c. 1 d. e. None of these. sleft sright

Implementing the Predictor: Step 4

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input In state number 3, what’s the new value of sleft? a. input b. ~input c. 1 d. e. None of these. sleft sright

Just Truth Tables...

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sleft sright input sleft' sright' 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

input

Implementing the Predictor: Step 4

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input sleft sright

Implementing the Predictor: Step 4

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In state number 0, what’s the new value of sright? a. input b. ~input c. 1 d. e. None of these. input sright

Implementing the Predictor: Step 4

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TADA!!

input sleft sright

You can often simplify, but that’s not the point.

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input sleft sright

Just for Fun: Renaming to Make a Pattern Clearer...

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pred last input pred' last' 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1

YES! 3 yes? 2 no? 1 NO! not taken taken not taken taken not taken take taken not taken

Outline

• Prereqs, Learning Goals, and !Quiz Notes
• Problems and Discussion

– A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs?

• Next Lecture Notes

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Steps to Build a Powerful Machine

(1) Number the states and figure out b: the number of bits needed to store the state number. (2) Lay out b D flip-flops. Together, their memory is the state as a binary number. (3) For each state, build a combinational circuit that determines the next state given the input. (4) Send the next states into a MUX with the current state as the control signal: only the appropriate next state gets used! (5) Use the MUX’s output as the new state of the flip-flops.

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With a separate circuit for each state, they’re often very simple!

How Powerful Is a DFA?

DFAs can model situations with a finite amount

• f memory, finite set of possible inputs, and

particular pattern to update the memory given the inputs. How does a DFA compare to a modern computer?

• a. Modern computer is more powerful.
• b. DFA is more powerful.
• c. They’re the same.

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Where We’ll Go From Here...

We’ll come back to DFAs again later in lecture. In lab you have been and will continue to explore what you can do once you have memory and events. And, before long, how you combine these into a working computer! Also in lab, you’ll work with a widely used representation equivalent to DFAs: regular expressions.

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Outline

• Prereqs, Learning Goals, and !Quiz Notes
• Problems and Discussion

– A Pushbutton Light Switch – Memory and Events: D Latches & Flip-Flops – General Implementation of DFAs (with a more complex DFA as an example) – How Powerful are DFAs?

• Next Lecture Notes

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Learning Goals: In-Class

By the end of this unit, you should be able to:

– Translate a DFA to a corresponding sequential circuit, but with a “hole” in it for the circuitry describing the DFA’s transitions. – Describe the contents of that “hole” as a combinational circuitry problem (and therefore solve it, just like you do other combinational circuitry problems!). – Explain how and why each part of the resulting circuit works.

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Next Lecture Learning Goals: Pre- Class

By the start of class, you should be able to:

– Convert sequences to and from explicit formulas that describe the sequence. – Convert sums to and from summation/”sigma” notation. – Convert products to and from product/”pi” notation. – Manipulate formulas in summation/product notation by adjusting their bounds, merging or splitting summations/products, and factoring out values.

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Next Lecture Prerequisites

See the Mathematical Induction Textbook Sections at the bottom of the “Readings and Equipment” page. Complete the open-book, untimed quiz on Vista that’s due before the next class.

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More problems to solve...

(on your own or if we have time)

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Problem: Traffic Light

Problem: Design a DFA with outputs to control a set of traffic lights.

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Problem: Traffic Light

Problem: Design a DFA with outputs to control a set

• f traffic lights.

Thought: try allowing an output that sets a timer which in turn causes an input like our “button press” when it goes off. Variants to try:

• Pedestrian cross-walks
• Turn signals
• Inductive sensors to indicate presence of cars
• Left-turn signals

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1 2 3

a a a,b,c b b,c c

PROBLEM: Does this accept the empty string?

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“Moore Machines”  DFAs whose state matters

A “Moore Machine” is a DFA that’s not about accepting or rejecting but about what state it’s in at a particular time. Let’s work with a specific example...

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