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CODING ASSISTED ADAPTIVE THRESHOLDING FOR SNEAK-PATH MITIGATION IN RESISTIVE MEMORIES

Zehui Chen UCLA Clayton Schoeny UCLA Lara Dolecek UCLA

Resistive memory and the sneak-path problem

• Crossbar structure for emerging non-

volatile memory (ReRAM, PCRAM).

• Simple
• High Density

[Zidan et al. 13]

2

• Crossbar structure for emerging non-

volatile memory (ReRAM, PCRAM).

• Simple
• High Density
• Sneak path(s) due to lack of isolation.
• Causing read errors
• Severe for HRS cells (binary 0)

Resistive memory and the sneak-path problem

High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

3

• Crossbar structure for emerging non-

volatile memory (ReRAM, PCRAM).

• Simple
• High Density
• Sneak path(s) due to lack of isolation.
• Causing read errors
• Severe for HRS cells (binary 0)

High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1 Desired Path (0 is read)

Resistive memory and the sneak-path problem

4

Resistive memory and the sneak-path problem

• Crossbar structure for emerging non-

volatile memory (ReRAM, PCRAM).

• Simple
• High Density
• Sneak path(s) due to lack of isolation.
• Causing read errors
• Severe for HRS cells (binary 0)

Sneak Path (1 is read) High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

5

Sneak-path modeling

• 1D1R (1 Diode 1 Resistor) structure with

unreliable diode.

Sneak Path High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

6

Sneak-path modeling

• 1D1R (1 Diode 1 Resistor) structure with

unreliable diode.

• Reliable diodes eliminate sneak-path

problem.

Sneak Path High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

7

Sneak-path modeling

• 1D1R (1 Diode 1 Resistor) structure with

unreliable diode.

• Reliable diodes eliminate sneak-path

problem.

High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

8

Sneak-path modeling

• 1D1R (1 Diode 1 Resistor) structure with

unreliable diode.

• Reliable diodes eliminate sneak-path

problem.

• With unreliable diode, sneak-path problem

reappear.

• We assume diode fails to open position

with probability 𝑞𝑔.

Diode fails to open position High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

9

Sneak-path modeling

• 1D1R (1 Diode 1 Resistor) structure with

unreliable diode.

• Reliable diodes eliminate sneak-path

problem.

• With unreliable diode, sneak-path problem

reappear.

• We assume diode fails to open position

with probability 𝑞𝑔.

Sneak Path Diode fails to open position High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

10

Sneak-path modeling

• Model sneak-path event as Boolean RV.

Sneak Path Diode fails to open position

By our definition, a sneak-path event occurs at cell (𝑗, 𝑘) if the following three conditions are met: 1) The bit value stored is 0. 2) There exists at least one combination of 𝑑, 𝑠 ∈ 1, … , 𝑜 , 𝑑 ≠ 𝑘, 𝑠 ≠ 𝑗 that induces a sneak-path defined by 𝐵𝑗𝑑 = 𝐵𝑠𝑑 = 𝐵𝑠𝑘 = 1. 3) The diode at cell location (𝑠, 𝑑) fails to open position. We use Boolean RV 𝑓𝑗𝑘 to denote the occurrence of sneak-path event.

High Resistance State (HRS) – binary 0 Low Resistance State (LRS) – binary 1

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𝑑 𝑠

Parallel resistance interference

[Zidan et al. 13]

• Effect of sneak-path event is modeled

as parallel resistance interference [Ben- Hur and Cassuto, 17].

Original cell resistance Sneak-path resistance Original cell resistance

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Parallel resistance interference

• Effect of sneak-path event is modeled

as parallel resistance interference [Ben- Hur and Cassuto, 17].

• With additive Gaussian measurement

noise, the resistance of cell (𝑗, 𝑘) is:

𝑆0: HRS resistance 𝑆1: LRS resistance 𝑆𝑡: Sneak-path resistance 𝜃: Gaussian measurement noise with variance 𝜏2 𝑠𝑗𝑘 = 1 𝑆0 + 𝑓𝑗𝑘 𝑆𝑡

−1

+ 𝜃, 𝑥ℎ𝑓𝑜 0 𝑗𝑡 𝑡𝑢𝑝𝑠𝑓𝑒, 𝑆1+𝜃, 𝑥ℎ𝑓𝑜 1 𝑗𝑡 𝑡𝑢𝑝𝑠𝑓𝑒.

13

Parallel resistance interference

• Effect of sneak-path event is modeled

as parallel resistance interference [Ben- Hur and Cassuto, 17].

• With additive Gaussian measurement

noise, the resistance of cell (𝑗, 𝑘) is:

𝑆1 𝑆0 𝑆0: HRS resistance 𝑆1: LRS resistance 𝑆𝑡: Sneak-path resistance 𝜃: Gaussian measurement noise with variance 𝜏2 𝑠𝑗𝑘 = 1 𝑆0 + 𝑓𝑗𝑘 𝑆𝑡

−1

+ 𝜃, 𝑥ℎ𝑓𝑜 0 𝑗𝑡 𝑡𝑢𝑝𝑠𝑓𝑒, 𝑆1+𝜃, 𝑥ℎ𝑓𝑜 1 𝑗𝑡 𝑡𝑢𝑝𝑠𝑓𝑒.

14

Parallel resistance interference

• Effect of sneak-path event is modeled

as parallel resistance interference [Ben- Hur and Cassuto, 17].

• With additive Gaussian measurement

noise, the resistance of cell (𝑗, 𝑘) is:

𝑆0: HRS resistance 𝑆1: LRS resistance 𝑆𝑡: Sneak-path resistance 𝜃: Gaussian measurement noise with variance 𝜏2 Sneak-path Event 𝑆1 𝑆0 1 𝑆0 + 1 𝑆𝑡

−1

𝑠𝑗𝑘 = 1 𝑆0 + 𝑓𝑗𝑘 𝑆𝑡

−1

+ 𝜃, 𝑥ℎ𝑓𝑜 0 𝑗𝑡 𝑡𝑢𝑝𝑠𝑓𝑒, 𝑆1+𝜃, 𝑥ℎ𝑓𝑜 1 𝑗𝑡 𝑡𝑢𝑝𝑠𝑓𝑒.

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A detection problem

• Need to estimate the bit value stored.

No side information / 𝑑 = : Posterior functions:

Λ0 𝑠𝑗𝑘 = 1 − 𝑟 ൣ𝑔 𝑠𝑗𝑘 − 𝑆0 𝑄 𝑓𝑗𝑘 = 0 𝐵𝑗𝑘 = 0, 𝑑 +𝑔 𝑠𝑗𝑘 −

1 𝑆0 + 1 𝑆𝑡 −1

𝑄 𝑓𝑗𝑘 = 1 𝐵𝑗𝑘 = 0, 𝑑 ሿ, Λ1 𝑠𝑗𝑘 = 𝑟𝑔 𝑠𝑗𝑘 − 𝑆1 . and 𝑔(∙): Gaussian density function with variance 𝜏2 𝑟: prior probability of 1 being stored 𝑑: side information Decide 0 Decide 1

• A threshold detector is used.

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Coding assisted adaptive thresholding

• Sneak-path probabilities on same

row/column are highly dependent [Cassuto, Kvatinsky and Yaakobi 16].

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Coding assisted adaptive thresholding

• Sneak-path probabilities on same

row/column are highly dependent.

• Proposed Construction:
• Main diagonal is all 0s (pilots).
• Provides side information.
• Low redundancy overhead (rate:

𝑜−1 𝑜 ).

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Characterizing inter-cell dependency

• We characterize the dependency

between two cells by computing 𝑄(𝑓𝑗𝑘|𝐵𝑗𝑘 = 0, 𝑓𝑗𝑗) .

Targeted cell Reference cell

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Characterizing inter-cell dependency

• We characterize the dependency

between two cells by computing 𝑄(𝑓𝑗𝑘|𝐵𝑗𝑘 = 0, 𝑓𝑗𝑗) .

• We characterize the dependency

between three cells by computing 𝑄(𝑓𝑗𝑘|𝐵𝑗𝑘 = 0, 𝑓𝑗𝑗, 𝑓

𝑘𝑘) .

Targeted cell Reference cell

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Characterizing inter-cell dependency

• We characterize the dependency

between two cells by computing 𝑄(𝑓𝑗𝑘|𝐵𝑗𝑘 = 0, 𝑓𝑗𝑗) .

• We characterize the dependency

between three cells by computing 𝑄(𝑓𝑗𝑘|𝐵𝑗𝑘 = 0, 𝑓𝑗𝑗, 𝑓

𝑘𝑘) .

• Different realization of 𝑑 induces

different distributions, which result in different thresholds (independent

• f data, can be precalculated).

Posterior functions :

Λ0 𝑠𝑗𝑘 = 1 − 𝑟 ൣ𝑔 𝑠𝑗𝑘 − 𝑆0 𝑄 𝑓𝑗𝑘 = 0 𝐵𝑗𝑘 = 0, 𝑑 +𝑔 𝑠𝑗𝑘 −

1 𝑆0 + 1 𝑆𝑡 −1

𝑄 𝑓𝑗𝑘 = 1 𝐵𝑗𝑘 = 0, 𝑑 ሿ, Λ1 𝑠𝑗𝑘 = 𝑟𝑔 𝑠𝑗𝑘 − 𝑆1 . and

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No side information: 𝑑 = Single reference cell: 𝑑 = {𝑓𝑗𝑗/𝑓

𝑘𝑘}

Two reference cells: 𝑑 = 𝑓𝑗𝑗, 𝑓

𝑘𝑘

Adaptive thresholding procedures

1) Measure resistances of cells on the diagonal and determine Ƹ 𝑓𝑗𝑗, 𝑗 ∈ 1, … , 𝑜 using a threshold detector.

Decide Ƹ 𝑓𝑗𝑗 = 0 Decide Ƹ 𝑓𝑗𝑗 = 1

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Adaptive thresholding procedures

1) Measure resistances of cells on the diagonal and determine Ƹ 𝑓𝑗𝑗, 𝑗 ∈ 1, … , 𝑜 using a threshold detector. 2) To read cell (𝑗, 𝑘), choose the appropriate threshold:

1) Double threshold scheme: same threshold is used for each row/column based on Ƹ 𝑓𝑗𝑗/ Ƹ 𝑓

𝑘𝑘. Targeted cell Reference cell

23

Adaptive thresholding procedures

1) Measure resistances of cells on the diagonal and determine Ƹ 𝑓𝑗𝑗, 𝑗 ∈ 1, … , 𝑜 using a threshold detector. 2) To read cell (𝑗, 𝑘), choose the appropriate threshold:

1) Double threshold scheme: same threshold is used for each row/column based on Ƹ 𝑓𝑗𝑗/ Ƹ 𝑓

𝑘𝑘.

2) Triple threshold scheme: select threshold based on Ƹ 𝑓𝑗𝑗 and Ƹ 𝑓

𝑘𝑘. Targeted cell Reference cells

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Example: Double threshold scheme

• Example: 𝑆1 = 100Ω, 𝑆0 = 1000Ω, 𝑆𝑡 = 250Ω, 𝑞𝑔 = 10−3, 𝜏 = 30, 𝑜 = 8.

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𝐶𝐹𝑆 = 2.304 × 10−4

Example: Double threshold scheme

• Example: 𝑆1 = 100Ω, 𝑆0 = 1000Ω, 𝑆𝑡 = 250Ω, 𝑞𝑔 = 10−3, 𝜏 = 30, 𝑜 = 8.

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𝐶𝐹𝑆 = 2.304 × 10−4 𝐶𝐹𝑆 = 1.602 × 10−4

BER improvement with adaptive thresholding

• BER vs. Noise:
• Large improvement for

moderate noise.

• Our schemes prevent

saturation of BER in high noise region.

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BER improvement with adaptive thresholding

• BER vs. 𝑞𝑔
• With more reliable diodes, the

improvement becomes larger.

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BER improvement with adaptive thresholding

• BER vs. 𝑜
• Improvement is consistent in the

range of 𝑜 we considered.

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• BER vs. 𝑞𝑔
• With more reliable diodes, the

improvement becomes larger.

Summary and future research

• Summary
• Utilizing the inter-cell dependency of sneak-path events, we provide a light-weight

estimation theoretic scheme to mitigate the sneak-path problem.

• From an estimation theory point of view, we explain why using precoded cells (pilots)

and the inter-cell dependency can help to deal with the sneak-path problem.

• Future research
• Combine with sneak-path reducing code (shaping code) to mitigate sneak-path

problem in selector-less array.

• Simulate proposed schemes with real memristor model using SPICE.
• Investigate the effect of spatial dependency of selector reliability on the proposed

scheme.

• Study trade-off between system complexity and selector reliability while using system

level approach to deal with the sneak-path problem.

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References

• [Ben-Hur and Cassuto, 17] Y. Ben-Hur and Y. Cassuto, “Detection and coding schemes for parallel

interference in resistive memories,” in Proc. IEEE Intl. Conf. on Commun. (ICC), Paris, France, May, 2017, pp. 1–7.

• [Cassuto, Kvatinsky and Yaakobi, 16] Y. Cassuto, S. Kvatinsky, and E. Yaakobi, “Information-theoretic

sneak-path mitigation in memristor crossbar arrays,” IEEE Trans. Inf. Theory, vol. 62, no. 9, pp. 4801– 4813, 2016.

• [Zidan et al. 13] M. A. Zidan, H. A. H. Fahmy, M. M. Hussain et al., “Memristor-based memory: The

sneak paths problem and solutions,” Microelectronics Journal, vol. 44, no. 2, pp. 176–183, 2013.

• [Naous et al. 16] R. Naous, M. A. Zidan, A. Sultan et al., “Pilot assisted readout for passive memristor

crossbars,” Microelectronics Journal, vol. 54, pp. 48–58, 2016.

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Thank you!

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