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CIS 314 Introduction to Digital Logic Prof. Michel A. Kinsy - PowerPoint PPT Presentation

CIS 314 Introduction to Digital Logic Prof. Michel A. Kinsy Computer and Information Science Systems & Computing Systems A system is a set of related components that works as a whole to achieve a goal A system contains: Inputs


  1. CIS 314 Introduction to Digital Logic Prof. Michel A. Kinsy Computer and Information Science

  2. Systems & Computing Systems • A system is a set of related components that works as a whole to achieve a goal • A system contains: ‣ Inputs ‣ Behavior ‣ Outputs inputs outputs Behavior : : • Behavior is a function that translates inputs to outputs Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  3. System Components • Components are electronic blocks: analog, digital, and mixed signal ‣ Analog system has values from a continuous set +5 V Time -5 Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  4. System Components • Components are electronic blocks: digital, analog, and mixed signal ‣ Digital system is a system in which signals have a finite number if discrete values +5 1 1 0 0 V Time -5 Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  5. Transistors • MOS - Metal-Oxide Semiconductor • MOS transistors have three terminals: drain, gate, and source • A transistor acts as switches: ‣ if the voltage on the gate terminal is higher/lower than the source terminal then a conducting path will be established between the drain and source terminals G G S D S D p-channel n-channel Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  6. Transistors V dd • CMOS - Complementary MOS • Transistors are the primary I O components of ICs • An integrated circuit (IC) or a chip is made up of transistors (these days V ss billions) and other electronic components • ICs are the building blocks of computers (CPU, bus interface, memory management unit) Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  7. Transistors Architecture Transistor Year Maker Technolog Count y Size 10μm Intel 4004 2,300 1971 Intel 10μm Intel 8008 3,500 1972 Intel Quad-core 2,000,000,000 2010 Intel 65nm 61-core Xeon 5,000,000,000 2012 Intel 22nm Phi Xbox One 5,000,000,000 2013 Microsoft/AM 28nm D 18-core Xeon 5,560,000,000 2014 Intel 22nm Haswell-E5 Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  8. Computer & Digital Design • Boolean algebra serves as the basis for computer logic design • Transistors are the mean to implement Boolean algebra in modern computer systems • Basic Boolean algebra ‣ Set of Elements: {0,1} ‣ Set of Operations: {., + , ¬ } • Digital equivalence ‣ Signals: High = 5V = 1; Low = 0V = 0 Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  9. Boolean Algebra to Digital Design N O T OR AND x x Symbol/Gate x F F F y y x F x y F x y F 0 1 0 0 0 0 0 0 Truth table 1 0 0 1 1 0 1 0 1 0 1 1 0 0 1 1 1 1 1 1 0 0 1 y y x Transistor x F x F circuit F y y x x 0 1 1 Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  10. Logic Gates Name Symbol Function Truth Table A B X 0 0 0 X = A • B A 0 1 0 AND X or 1 0 0 B 1 1 1 X = AB A B X A OR 0 0 0 X X = A + B 0 1 1 B 1 0 1 1 1 1 A X NOT 0 1 X = A ’ A X 1 0 A B X 0 0 1 A NAND 0 1 1 X = (AB) ’ 1 0 1 X 1 1 0 B A B X 0 0 1 A NOR 0 1 0 X = (A + B) ’ X 1 0 0 1 1 0 B A B X X = A  B XOR A 0 0 0 Exclusive OR Or X 0 1 1 X = A ’ B + AB ’ 1 0 1 B 1 1 0 A B X X = (A  B) ’ XNOR A 0 0 1 0 1 0 X or 1 0 0 Exclusive NOR X = A ’ B ’ + AB B 1 1 1 or Equivalence Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  11. Boolean Algebra to Digital Design • Addition 1 0 0 1 0 1 0 1 Sum 1 1 1 0 Carry 0 0 0 1 • Truth Table A B Cin Sum Cout 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  12. Boolean Algebra to Digital Design A B Cin Sum Cout • Truth Table 0 0 0 0 0 0 0 1 1 0 0 1 0 1 0 0 1 1 0 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 1 1 1 1 1 • Equations Sum = Cin . A’ . B’ + B . Cin ’ . A’ + A . Cin ’ . B’ + A . B . Cin Cout = A’ . B . Cin + A . B’ . Cin + A . Cin ’ . B + B . Cin . A = A . B + A . Cin + B . Cin Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  13. Boolean Algebra to Digital Design Sum = Cin . A’ . B’ + B . Cin ’ . A’ + A . Cin ’ . B’ + A . B . Cin Cin A Sum B Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  14. Boolean Algebra to Digital Design Cout = A’ . B . Cin + A . B’ . Cin + A . Cin ’ . B + B . Cin . A = A . B + A . Cin + B . Cin Cin A B Cout Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  15. Types of Digital Circuits • Combinatorial logic ‣ A combinational circuit consists of logic gates whose outputs, at any time, are determined by combining the values of the inputs outputs inputs x Combinational Circuits • Sequential logic ‣ Output depends not only on the present value of its input signals but on the sequence of past inputs Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  16. Types of Digital Circuits • Sequential logic ‣ Output depends not only on the present value of its input signals but on the sequence of past inputs ‣ We now have a memory requirement! outputs inputs x Combinational Circuits next state present state Memory Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  17. Memory & Digital Design • A sequential circuit combinational circuit with feedback through memory ‣ The stored information at any time defines a state • Outputs depends on inputs and previous inputs ‣ Previous inputs are stored as binary information into memory • Next state depends on inputs and present state outputs inputs x Combinational Circuits next state present state Memory Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  18. Types of Digital Circuits • Sequential logic ‣ Storage elements observe inputs and can change state only in relation to a timing signal ‣ Need for discrete instances of time ‣ We now have a clock requirement! outputs inputs x Combinational Circuits next state present state Memory CLOCK Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  19. Clock • A synchronous system is synchronized according to a clock • A clock cycle or cycle time or clock period is the duration between two consecutive rising or falling edges Rising clock edge Cycle time Falling clock edge 4 GHz = clock speed = 1 = 1 cycle time 250 ps Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  20. Storage Elements (Memory) • A storage element can maintain a binary state (0,1), until directed by an input signal to switch state • Main difference between storage elements: ‣ Number of inputs they have ‣ How the inputs affect the binary state Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  21. Storage Elements (Memory) • A storage element can maintain a binary state (0,1), until directed by an input signal to switch state • Two main types: ‣ Latches (level-sensitive) ‣ Flip-Flops (edge-sensitive) • Latches are useful in asynchronous sequential circuits • Flip-Flips are built with latches Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  22. Latches & Flip Flops • A latch is binary storage element • Can store a 0 or 1 SR Latch • The most basic memory • Easy to build ‣ Built with gates (NORs, NANDs, NOT) S’R’ Latch SR Latch with Clock D Latch Computer Architecture and Embedded Systems Laboratory (CAES Lab)

  23. Latches & Flip Flops • A flip flop can be built using two latches in a master-slave configuration • A master latch receives external inputs • A slave latch receives inputs from the master latch • Depending on the clock signal, only one latch is active at any given time ‣ If clock=1, the master latch is enabled and the inputs are latched ‣ if clock=0, the master is disabled and the slave is activated to generate the outputs Computer Architecture and Embedded Systems Laboratory (CAES Lab)

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