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Chapter 7 Utilities for High-Level Descriptions Part 2 1 benyamin@mehr.sharif.edu Array Type Declaration TYPE arry_name IS ARRAY range OF element_type TYPE qit_nibble IS ARRAY (3 DOWNTO 0) OF qit; TYPE qit_byte IS ARRAY (1 TO 8) OF qit;


  1. Chapter 7 Utilities for High-Level Descriptions Part 2 1 benyamin@mehr.sharif.edu

  2. Array Type Declaration TYPE arry_name IS ARRAY range OF element_type TYPE qit_nibble IS ARRAY (3 DOWNTO 0) OF qit; TYPE qit_byte IS ARRAY (1 TO 8) OF qit; TYPE qit_word IS ARRAY (1 TO 16) OF qit; TYPE byte IS ARRAY (7 DOWNTO 0) OF BIT; 2 benyamin@mehr.sharif.edu

  3. Array Type Declaration TYPE qit_mem IS ARRAY ( 0 TO 7 ) OF qit_nibble; TYPE mem IS ARRAY( 0 TO 3) OF byte; TYPE mem2 IS ARRAY (3 DOWNTO 0,0 TO 7) OF BIT; 3 benyamin@mehr.sharif.edu

  4. Array Initialization SIGNAL x: qit_byte := ( 5=>’Z’ , OTHERS=>’1’); SIGNAL x: qit_byte := ( 1 DOWNTO 0=>’Z’ ,3 TO 4=>’X’ , OTHERS=>’1’); SIGNAL x: qit_byte := (OTHERS=>’Z’); 4 benyamin@mehr.sharif.edu

  5. 2-D Array Initialization SIGNAL m:mem2:=( (‘0’,’1’,’1’,’1’,’1’,’0’,’1’,’Z’), (‘0’,’1’,’1’,’0’,’1’,’0’,’1’,’Z’), (‘Z’,’1’,’0’,’1’,’1’,’0’,’1’,’Z’), (‘1’,’1’,’1’,’0’,’1’,’0’,’1’,’Z’), ); SIGNAL m:mem2:=(OTHERS=>”01010101”); SIGNAL m:mem2:=(OTHERS=>(OTHERS=>’Z’)); SIGNAL m:mem2:=(OTHERS=>(0 TO 1 =>’1’,OTHERS=>’0’)); 5 benyamin@mehr.sharif.edu

  6. Array Indexing SIGNAL x8: qit_byte; SIGNAL x16: qit_word; SIGNAL mq:qit_mem; SIGNAL m:mem2; … x8<=x16(11 downto 4); x16(15 downto 12) <=x8(4 downto 1); (x8(1),x8(3),x8(2))<=x16(10 downto 8); x8<=x16(1)& x16(3)& x16(2)& x16(15 downto 11); mq(1)<=x8; mq(3)(5)<=x16(3); X16(10 downto 8)<=mq(4)(3 DOWNTO 1); X8(1)<=to_qt ( m(2,5) ); 6 benyamin@mehr.sharif.edu

  7. Noninteger Indexing TYPE qit_2d IS ARRAY(qit,qit) OF qit; CONSTANT qit_nand2 :qit_2d :=( -- ‘0’ ‘1’ ‘Z’ ‘X’ (‘1’,’1’,’1’,’1’), –’0’ (‘1’,’0’,’0’,’X’), –’1’ (‘1’,’0’,’0’,’X’), –’Z’ (‘1’,’X’,’X’,’X’) –’X’ ); 7 benyamin@mehr.sharif.edu

  8. Noninteger Indexing USE WORK.basic_utilities.ALL; ENTITY nand2 IS PORT(i1,i2:IN qit;o1:OUT qit); END; ARCHITECTRE table_based OF nand2 IS BEGIN o1<= qit_nand2(i1,i2) AFTER 10 NS; END; 8 benyamin@mehr.sharif.edu

  9. Noninterger Indexing CONSTANT qit_nand2:qit_2d :=( ‘0’ => (OTHERS=>’1’), ‘X’ => (‘0’ => ‘1’ , OTHERS=> ‘X’), OTHERS =>(‘0’ =>’1’ ,’X’ =>’X’,OTHERS=>’0’) ); 9 benyamin@mehr.sharif.edu

  10. Unconstrained Arrays TYPE BIT_VECTOR IS ARRAY (NATURAL RANGE <>) OF BIT; TYPE STRING IS ARRAY (POSITIVE RANGE <>) OF BIT; TYPE INTEGER_VECTOR IS ARRAY (NATURAL RANGE <>) OF INTEGER; Type mark 10 benyamin@mehr.sharif.edu

  11. File Type • VHDL standard package provides file i/o operations • Default file type is text file • Users can define their own file types 11 benyamin@mehr.sharif.edu

  12. File Type Declaration TYPE type_name IS FILE OF element_type TYPE logic_data IS FILE OF CHARACTERS; TYPE std_file Is FILE OF std_logic_vector(7 downto 0); 12 benyamin@mehr.sharif.edu

  13. FILE Declaration FILE file_name : file_type [OPEN mode] [IS physical_file_name]; Kind ::= READ_MODE | WRITE_MODE|APPEND_MODE; Open file in READ_MODE FILE inp1 : logic_data; FILE inp2 : logic_data IS “input.dat”; FILE inp3 : logic_data OPEN READ_MODE IS “input.dat”; 13 benyamin@mehr.sharif.edu

  14. File Operations – Open/Close FILE_OPEN(file_var,physical_file_name,mode) FILE_CLOSE(file_var); FILE_OPEN(inp1,”input.dat”,WRITE_MODE); FILE_OPEN(inp2,”input.dat”,READ_MODE); FILE_OPEN(inp3,”input.dat”); READ_MODE is default … FILE_CLOSE(inp1); FILE_CLOSE(inp2); 14 benyamin@mehr.sharif.edu

  15. FILE Operations – End of File ENDFILE(file_var) • Returns TRUE if subsequent operation can not be done from the file WHILE NOT ENDFILE(f1) LOOP --Some FILE operations on f1 END LOOP; 15 benyamin@mehr.sharif.edu

  16. FILE I/O READ(file_var,variable); WRITE(file_var,variable); • Type of variable must be same as file type • All file operations are sequential WRITE(f1,”01010100”); Signal a:std_logic_vector(7 downto 0); READ(f1,a); 16 benyamin@mehr.sharif.edu

  17. FILE I/O Example PROCEDURE assign_bits( SIGNAL s:OUT BIT; file_name: IN STRING; period : IN TIME) IS VARIABLE char :CHARACTER; VARIABLE current: TIME:=0 NS; FILE iput_value_file : logic_data; BEGIN FILE_OPEN(input_value_file,file_name,READ_MODE); WHILE NOT ENDFILE(input_value_file) LOOP READ(input_value_file,char); IF char=‘0’ OR char=‘1’ THEN current:=current+period; IF char=‘0’ THEN s<=TRANSPORT ‘0’ AFTER current; ELSIF char=‘1’ THEN s<=TRANSPORT ‘1’ AFTER current; END IF; END IF; END LOOP; END; 17 benyamin@mehr.sharif.edu

  18. Operator Overloading • Operators can be represented by their strings c<=a AND b; c<=“AND” (a,b); • Each subprogram with different types of parameters can be distinguished from each other 18 benyamin@mehr.sharif.edu

  19. NAND Overloading FUNCTION “NAND” (a,b:qit) RETURN qit IS CONSTANT qit_nand2 :qit_2d :=( -- ‘0’ ‘1’ ‘Z’ ‘X’ (‘1’,’1’,’1’,’1’), –’0’ (‘1’,’0’,’0’,’X’), –’1’ (‘1’,’0’,’0’,’X’), –’Z’ (‘1’,’X’,’X’,’X’) –’X’ ); BEGIN return qit_nand2(a,b); END; 19 benyamin@mehr.sharif.edu

  20. Not Overloading TYPE qit_1d IS ARRAY(qit) OF qit; … FUNCTION “NOT” (a:qit) RETURN qit IS CONSTANT qit_not :qit_1d :=(‘1’,’0’,’0’,’X’); BEGIN return qit_not(a); END; 20 benyamin@mehr.sharif.edu

  21. RC Calculation PACKAGE basic_utilities IS CONSTANT c:capacitance:= 5 ffr; TYPE capacitance … CONSTANT r:resistance:=10 ohm; TYPE resistance … o1<= i1 and i2 AFTER r*c; FUNCTION “*” (a:resistance;b:capacitance) RETURN TIME; END; PACKAGE BODY basic_utilities IS FUNCTION “*” (a:resistance;b:capacitance) RETURN TIME IS BEGIN RETURN (( a/ 1 l_o) * ( b / 1 ffr) * 1 FS) / 1000; END; END; 21 benyamin@mehr.sharif.edu

  22. Case Statement CASE var IS WHEN equality1 => statements WHEN equality2 => statements WHEN equalityn => statements WHEN OTHERS => statements END CASE; • Multiple if –elsif statements cam be replaced by Case statement • Var can be from each type with defined “=“ operator 22 benyamin@mehr.sharif.edu

  23. Assign_bits Using CASE PROCEDURE assign_bits( SIGNAL s:OUT qit; file_name: IN STRING; period : IN TIME) IS VARIABLE char :CHARACTER; VARIABLE current: TIME:=0 NS; FILE iput_value_file : logic_data; BEGIN FILE_OPEN(input_value_file,file_name,READ_MODE); WHILE NOT ENDFILE(input_value_file) LOOP READ(input_value_file,char); current:=current+period; CASE char IS WHEN ‘0’ => s<=TRANSPORT ‘0’ AFTER current; WHEN ‘1’ =>s<=TRANSPORT ‘1’ AFTER current; WHEN ‘Z’ =>s<=TRANSPORT ‘Z’ AFTER current; WHEN ‘X’ =>s<=TRANSPORT ‘X’ AFTER current; WHEN OTHERS => current:=current-period; END CASE; END LOOP; END; 23 benyamin@mehr.sharif.edu

  24. Subtypes • Subtypes consists the subsets of the values of the previously defined type • The original type is called BASE-TYPE • All types are subtypes of themselves 24 benyamin@mehr.sharif.edu

  25. Subtype Declaration SUBTYPE subtype_name IS base_type range SUBTYPE compatible_nibble_bits IS BIT_VECTOR(3 DOWNTO 0); SUBTYPE ten_value_logic IS INTEGER RANGE 0 TO 9; SUBTYPE rit IS qit RANGE ‘0’ TO ‘Z’; SUBTYPE bin IS qit RANGE ‘0’ TO ‘1’; 25 benyamin@mehr.sharif.edu

  26. Std_logic Subtypes Subtype Values Subtype X01 IS std_logic RANGE ‘X’ TO ‘1’ X01 Subtype X01Z IS std_logic RANGE ‘X’ TO ‘Z’ X01Z Subtype UX01 IS std_logic RANGE ‘U’ TO ‘1’ UX01 Subtype UX01Z IS std_logic RANGE ‘U’ TO ‘Z’ UX01Z Signal a : X01Z :=‘Z’; Signal b : UX01Z :=‘U’; 26 benyamin@mehr.sharif.edu

  27. Record Types • Array is a composit type with the same element types • Records are composite type with different element types 27 benyamin@mehr.sharif.edu

  28. Record Type Declaration TYPE rec_type IS RECORD element_name : type; {element_name : type;} END RECORD; 28 benyamin@mehr.sharif.edu

  29. Record Type Declaration TYPE opcode IS (sta,lda,add,sub,and,jmp,nop); TYPE mode IS RANGE 0 TO 3; TYPE address IS BIT_VECTOR(10 DOWNTO 0); TYPE instruction IS RECORD opc:opcode; mde:mode; adr:address; END RECORD; 29 benyamin@mehr.sharif.edu

  30. Record Type Declaration SIGNAL instr: instruction :=(nop,0,”00000000000”); Instr.opc<=sta; Instr.mde<=2; Instr.adr<=“00011110011”; Instr<=(adr=>(OTHERS=>’1’) , mde=>2 , opc=>sub); 30 benyamin@mehr.sharif.edu

  31. Alias Declaration ALIAS new_name : type IS object; • An object, an indexed part of it, or a slice of it can be given alternative names 31 benyamin@mehr.sharif.edu

  32. Alias Declaration Signal flag:BIT_VECTOR(7 DOWNTO 0); SIGNAL instr: instruction :=(nop,0,”00000000000”); ALIAS carry : BIT IS flag(7); ALIAS nibble_flag: BIT_VECTOR(4 DOWNTO 1) IS flag(3 DOWNTO 0); ALIAS opcode1:BIT_VECTOR(10 DOWNTO 0) IS Instr.opc; ALIAS page: BIT_VECTOR(2 DOWNTO 0) IS instr.adr(10 DOWNTO 8); ALIAS offset: BIT_VECTOR(7 DOWNTO 0) IS instr.adr(7 DOWNTO 0); page<=“001”; Hexadecimal String offset<=X“F1”; 32 benyamin@mehr.sharif.edu

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