Chapter 6
Symbolic execution
Course “Model checking” Volker Stolz, Martin Steffen Autumn 2019
Chapter 6 Symbolic execution Course Model checking Volker Stolz, - - PowerPoint PPT Presentation
Chapter 6 Symbolic execution Course Model checking Volker Stolz, Martin Steffen Autumn 2019 Section Targets Chapter 6 Symbolic execution Course Model checking Volker Stolz, Martin Steffen Autumn 2019 Chapter 6 Learning
Course “Model checking” Volker Stolz, Martin Steffen Autumn 2019
Chapter 6 “Symbolic execution” Course “Model checking” Volker Stolz, Martin Steffen Autumn 2019
The chapter gives an not too deep introduction to symbolic execution and concolic execution.
Targets Introduction Testing and path coverage Symbolic execution Concolic testing
Testing and path coverage Symbolic execution Concolic testing Chapter 6 “Symbolic execution” Course “Model checking” Volker Stolz, Martin Steffen Autumn 2019
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-6
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-7
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-8
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-9
(and system) “quality”
engineering cycle
“white-box” testing
Goals
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-10
When have I tested “enough”? path coverage
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-11
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-11
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-11
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-11
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-11
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-11
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-12
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-13
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-13
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-14
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-15
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-15
Symbolic representation x > 0 ∧ y = 10
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-16
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-17
read())
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-18
Constraint solver Solve the path constraint 2s = 12
multiplication
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-19
Symbolic execution for dummies
approriate SMT solver
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-20
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-21
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-22
what can one do (beyond accepting the SE won’t cover all path)?
Concolic testing Concrete & Symbolic = “concolic”
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-23
Random testing
Symbolic execution
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-24
Dynamic execution
random testing
(x, y) = 700, 500) Symbolic execution
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-24
Dynamic execution
random testing
(x, y) = 700, 500)
Symbolic execution
x1 = x, y1 = y
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-24
Dynamic execution
random testing
(x, y) = 700, 500)
Symbolic execution
x1 = x, y1 = y
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-24
Dynamic execution
random testing
(x, y) = 700, 500)
Symbolic execution
x1 = x, y1 = y
x1 = 700
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-24
Dynamic execution
random testing
(x, y) = 700, 500)
Symbolic execution
x1 = x, y1 = y
( ) = (700 10)
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-25
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-25
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-25
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-26
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-27
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-27
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-27
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-28
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-28
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-28
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-29
IN5110 – Verification and specification of parallel systems Targets Targets & Outline Introduction
Testing and path coverage Symbolic execution Concolic testing
6-30
Bibliography [1] Baldoni, R., Coppa, E., D’Ella, D. C., Demetrescu, C., and Finocchi, I. (2018). A survey of symbolic execution techniques. ACM Computing Survey, 51(3). [2] Godefroid, P., Klarlund, N., and Sen, K. (2005). Dart: Directed automated runtime testing. In ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI), pages 213–223. ACM. [3] King, J. C. (1976). Symbolic execution and program testing. Communications of the ACM, 19(7):385–394.