Branch Prediction Philipp Koehn 11 October 2019 Philipp Koehn - - PowerPoint PPT Presentation

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Branch Prediction Philipp Koehn 11 October 2019 Philipp Koehn - - PowerPoint PPT Presentation

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Branch Prediction Philipp Koehn 11 October 2019 Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019 Control Hazard 1 Also called branch hazard Selection of next instruction depends on outcome of previous

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Branch Prediction

Philipp Koehn 11 October 2019

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Control Hazard

  • Also called branch hazard
  • Selection of next instruction depends on outcome of previous
  • Example

beq $s0, $s1, ff40 sub $t0, $s0, $t3 – sub instruction only executed if branch condition fails → cannot start until branch condition result known

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Methods

  • Assume branch not taken

– start execution of following instructions – if wrong, flush them

  • Reduce delay of branches

– compute branch address and condition in fewer cycles → less flushing

  • Dynamic branch prediction

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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assume branch not taken

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Pipelined Datapath

ALU Add Instruction Memory Address Instruction Registers Read register 1 Read register 2 Write register Write data Read data 1 Read data 2 Data Memory Address Write data Zero ADD Result Selector Selector Sign extended Shift Left PC Selector 4 Read data IF: Instruction Fetch ID: Instruction decoder register file read MEM: Memory access EX: Execute / address calculate WB: Write Back

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch: Address Calculation

ALU Add Instruction Memory Address Instruction Registers Read register 1 Read register 2 Write register Write data Read data 1 Read data 2 Data Memory Address Write data Zero ADD Result Selector Selector Sign extended Shift Left PC Selector 4 Read data IF: Instruction Fetch ID: Instruction decoder register file read MEM: Memory access EX: Execute / address calculate WB: Write Back

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch: Condition Checking

ALU Add Instruction Memory Address Instruction Registers Read register 1 Read register 2 Write register Write data Read data 1 Read data 2 Data Memory Address Write data Zero ADD Result Selector Selector Sign extended Shift Left PC Selector 4 Read data IF: Instruction Fetch ID: Instruction decoder register file read MEM: Memory access EX: Execute / address calculate WB: Write Back

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Idea

  • Assume branch not taken
  • Execute the subsequent instructions
  • If branch should have been taken

→ flush out subsequent instruction processing

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch Execution

IF

beq $s0,$s1,ff40

200 400 600 800 1000 1200

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch Execution

IF

beq $s0,$s1,ff40

200 400 600 800 1000

ID IF

1200

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch Execution

IF

beq $s0,$s1,ff40

200 400 600 800 1000

ID EX IF ID

1200

IF

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Take Branch: Invalidates Instructions

IF IF IF IF

beq $s0,$s1,ff40

200 400 600 800 1000

ID EX ID EX

1200

ID

Hazard

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Flush Instructions

EX IF ID IF ID IF MEM IF

beq $s0,$s1,ff40

200 400 600 800 1000

ID WB EX

1200

IF

X X X X X X

bubble bubble bubble

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Flush Instructions

  • Change program counter
  • Flush instructions in stages IF, ID, EX, MEM

⇒ Re-fetch instruction in IF ⇒ Zero out control lines for ID, EX, MEM

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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fast branch execution

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Idea

  • Branch instruction

beq $s0, $s1, ff40

  • Computations required

– target address (PC + specified offset) – condition check (simple equality)

  • Idea:

carry out these computations quickly

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch Computation in ID Stage

  • Role of ID stage

– decode what the instruction is – look up register values

  • Now

– just assume that it is a branch – add special wiring for branch calculation – if not a branch, ignore results

  • Benefit:

reduce branch flushing from 3 to 1 instruction

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Pipeline with Hazard Detection Unit

ALU Add Instruction Memory Address Instruction Registers Read register 1 Read register 2 Write register Write data Read data 1 Read data 2 Data Memory Address Write data Zero ADD Result Selector Selector Sign extended Shift Left PC Selector 4 Read data IF: Instruction Fetch ID: Instruction decoder register file read MEM: Memory access EX: Execute / address calculate WB: Write Back Branch Handling Unit

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Register Values for Condition Check

ALU Add Instruction Memory Address Instruction Registers Read register 1 Read register 2 Write register Write data Read data 1 Read data 2 Data Memory Address Write data Zero ADD Result Selector Selector Sign extended Shift Left PC Selector 4 Read data IF: Instruction Fetch ID: Instruction decoder register file read MEM: Memory access EX: Execute / address calculate WB: Write Back Branch Handling Unit

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Address Calculation

ALU Add Instruction Memory Address Instruction Registers Read register 1 Read register 2 Write register Write data Read data 1 Read data 2 Data Memory Address Write data Zero ADD Result Selector Selector Sign extended Shift Left PC Selector 4 Read data IF: Instruction Fetch ID: Instruction decoder register file read MEM: Memory access EX: Execute / address calculate WB: Write Back Branch Handling Unit

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Also a Data Hazard?

  • Condition check requires register values
  • These may be changed by preceding instructions in pipeline

⇒ Forwarding and stalling needed

  • Adds complexity

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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branch prediction

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Prediction

  • So far:

predict branch not taken

  • Compiler may order instructions → more frequent case in sequence
  • Now:

dynamic branch prediction based on branch history table

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Branch History Table

  • Idea:

keep record of branch history

  • Many branches, many executions
  • Keep it simple:

– index by lower order bits of branch address (ignore collisions) – just store last decison (1 bit)

  • Special memory in ID stage

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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Example: Loop

  • Example:

Loop 9 times, then exit loop

  • False predictions

– last iteration (not taken, after 9 times taken) – first iteration (taken, previously exited loop)

  • Prediction accuracy:

8/10 = 80%

  • Can we do better?

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019

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2 Bits

  • Idea:

record frequency

1 2 3

took branch took branch took branch took branch not taken not taken not taken not taken

  • Previous example (loop 9 times, then exit loop)

Iteration Value Prediction 1 2 take branch (correct) 2 3 take branch (correct) ... ... ... 9 3 take branch (correct) 10 3 take branch (wrong)

Philipp Koehn Computer Systems Fundamentals: Branch Prediction 11 October 2019