Bas Basic ic El Elec. ec. En Engr gr. . Lab Lab ECS EC S - - PowerPoint PPT Presentation

• Dr. Prapun Suksompong

prapun@siit.tu.ac.th

1

Bas Basic ic El Elec.

• ec. En

Engr gr. . Lab Lab

EC ECS S 204 04/210

Office Hours: BKD 3601-7 Tuesday 9:30-10:30 Friday 14:00-16:00

Lab 7

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 Operational amplifier  Inverting amplifier  Inverting Integrator

Op-Amp 741

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 OPerational AMPlifier

(1) Offset null + (2) Inverting input (3) Noninverting input (4) V- NC (8) V+ (7) Offset null (5) Output (6) Noninverting input Inverting input V+ , Positive power supply V- , Negative power supply Output (3) (2) (7) (4) (6)

O

Placing op amps on the proto-board

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 Plug in op amp chips so that they straddle the troughs on the

proto board.

 In this way, each pin is connected to a different hole set.





Powering the op amp

5

 The op amp must be powered by

voltage supplies.

 These supplies are often ignored

in op amp circuit diagrams for the sake of simplicity.

Noninverting input Inverting input (3) (2) (7) (4) (6) + Vcc

• +

Vcc

• (1) Offset null

+ (2) Inverting input (3) Noninverting input (4) V- NC (8) V+ (7) Offset null (5) Output (6)

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Part A: Inverting Am Amplif ifie ier

6

F

• i

R

R V V. R  

RR Vi RF +5 V

• 5 V

+ + Vo

• 7

6 4 2 3 Sinusoid 1 kHz

Part A: Inverting Am Amplif ifie ier

7

F

• i

R

R V V. R  

RR Vi RF +5 V

• 5 V

+ Vo 7 6 4 2 3 Sinusoid 1 kHz

+ Vcc

• +

Vcc

• CH1

CH2

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Part B: Inverting In Integ egrat ator

• r

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R + + vo

• iC

iin vi V+ V- X C + vC -

Zero-average input (DC offset = 0)

             

1

i C i

• t
• i

i t i t v t d C v t R dt v t v v t dt RC     



h 2 h h   1 2 T h RC

Area = hT/2

T

 

i

v t

 

• v

t

Inverting Integrator (2)

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 An input with nonzero mean

(DC offset) can saturate the

• p amp.

R + + vo

• iC

iin vi V+ V- X C + vC -

             

1

i C i

• t
• i

i t i t v t d C v t R dt v t v v t dt RC     



T

 

i

v t

 

• v

t

Inverting Integrator: AC SS Analysis

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 The gain at f = 0 is unbounded.

R + + vo

• iC

iin vi V+ V- X C + vC -

1

C

• i

i

Z V V R V R j C                 

Inverting Integrator w/ Shunt Resistor

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 In practical circuit, a large resistor Rp is usually shunted

across the capacitor

 Observe that at f = 0, the gain is finite.

R + C + vo

• iin

vi V+ V- X Rp

/ / 1

C p

• i

p i p

Z R V V R R V R j R C                  

Inverting Integrator w/ Shunt Resistor

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 The output will not be

triangular anymore.

 “Virtually triangular” if

RpC >> T/2.

R + C + vo

• iin

vi V+ V- X Rp

h  1 1 Rp R r h r   

1 2 exp

p

r fR C          

 

i

v t

 

• v

t