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Elettronica e Controllo degli Attuatori SMA Adriano Basile STMicroelectronics, System LAB Content 2 STMicroelectronics: Who we are Shape Memory Alloy Brief Mechanical Considerations SMA Driving Topology Experimental Results Who we are 3


  1. Elettronica e Controllo degli Attuatori SMA Adriano Basile STMicroelectronics, System LAB

  2. Content 2 STMicroelectronics: Who we are Shape Memory Alloy Brief Mechanical Considerations SMA Driving Topology Experimental Results

  3. Who we are 3 • A global semiconductor leader • The largest European semiconductor company • 2012 revenues of $8.49B (1) • Approx. 48,000 employees worldwide (1) • Approx. 11,500 (1) people working in R&D • 12 manufacturing sites • Listed on New York Stock Exchange, Euronext Paris and Borsa Italiana, Milano (1) Including ST-Ericsson

  4. Partners with our Customers worldwide 4 79 sales offices in 35 countries

  5. An unwavering Commitment to R&D 5 Advanced research and development centers around the globe 16,000 patents; ~9,000 patent families; 515 new filings (in 2012) ~ 11,500 (1) people working in R&D and product design (1) Including ST-Ericsson

  6. Product Segments 6 Sense & Power and Automotive Embedded Processing Solutions Products (SP&A) (EPS) Imaging, Automotive Digital Microcontrollers, Analog, MEMS Industrial & BiCMOS, Product Convergence Memory & Wireless & Sensors Power Discrete ASIC & Silicon Group Group Secure MCU (WPS)* (AMS) Group (IPD) Photonics (APG) (DCG) (MMS) (IBP) * former ST-Ericsson legacy products

  7. Where you find us 7 Our MEMS & Sensors Our digital consumer products are augmenting are powering the augmented the consumer experience digital lifestyle Our automotive products Our Microcontrollers are making driving safer, are everywhere greener and more making everything smarter entertaining and more secure Our smart power products are making more of our energy resources

  8. Content 8 STMicroelectronics: Who we are Shape Memory Alloy Brief Mechanical Considerations SMA Driving Topology Experimental Results

  9. Shape Memory Alloy (1/2) 9 9 • Shape memory alloys (SMA) form group of metals that recovers particular shape when heated above their transformation temperatures. • SMA deforms easily under stress, if such alloys are plastically deformed at one temperature, they will completely recover their original shape on being raised to a higher temperature. • The shape memory alloys have two stable phases • the high – temperature phase, called austenite • the low – temperature phase, called martensite • Shape memory alloys are also used in a wide range of medical and dental applications (healing broken bones, misaligned teeth . . . ) Solid-to-solid state transformation

  10. Shape Memory Alloy (2/2) 10 10 Forza Diametro Forza Contrazione Contrazione suggerita [μm] massima [N] Massima suggerita [N] 25 0,3 5% 0,1 3,5% 50 1,2 5% 0,3 3,5% 76 2,7 5% 0,8 3,5% 100 4,7 5% 1,3 3,5% 150 6,2 5% 2,7 3,5% 200 19 5% 5 3,5% 300 42 5% 12 3,5% 400 75 5% 21 3,5% 500 118 5% 33 3,5%

  11. Content 11 STMicroelectronics: Who we are Shape Memory Alloy Brief Mechanical Considerations SMA Driving Topology Experimental Results

  12. Advantages for Linear Actuators 12 Traditional Approach SMA Approach Pro: • The movement is really linear • The system is silent • The SMA wire does not occupy space Con: • One direction with one wire (a counter force is needed)

  13. Further Mechanical Considerations 13 Spring as counterforce (no control) Second Wire as counterforce (fully controlled) The Electronic has to satisfy both the approaches and…

  14. Content 14 STMicroelectronics: Who we are Shape Memory Alloy Brief Mechanical Considerations SMA Driving Topology Experimental Results

  15. SMA Control Drv Topology 15 Forza Diametro Forza Contrazione Contrazione suggerita [μm] massima [N] Massima suggerita [N] 25 0,3 5% 0,1 3,5% High Side Driving 50 1,2 5% 0,3 3,5% 76 2,7 5% 0,8 3,5% 100 4,7 5% 1,3 3,5% 150 6,2 5% 2,7 3,5% 200 19 5% 5 3,5% Low Side Driving 300 42 5% 12 3,5% 400 75 5% 21 3,5% 500 118 5% 33 3,5% V DD V DD Current Shape Memory Alloy Generator wire Current Shape Memory Alloy wire Sink

  16. SMA Control Drv High Side Topology 16 Vdd EXT Driver P-MOS Driver INPUT V_SMA + MCU ADC S/H PGA Offset R_sense – Shape Memory Alloy DAC wire • MCU schedules and controls the main process routines: • External Commands and Communication; • SMA Actuators Current generators control; • SMA data acquisition and elaboration; • Offset management.

  17. SMA Control Drv Low Side Topology 17 Vdd Shape EXT Memory INPUT Alloy wire V_SMA + MCU ADC S/H PGA Offset – R_sense DAC Driver N-MOS Driver • MCU schedules and controls the main process routines: • External Commands and Communication; • SMA Actuators Current Sink control; • SMA data acquisition and elaboration; • Offset management.

  18. Spec Example 18 Forza Diametro Forza Contrazione Contrazione suggerita [μm] massima [N] Massima suggerita [N] 76 2,7 5% 0,8 3,5% Vdd EXT Driver P-MOS Driver INPUT SMA Driving Waveform + V_SMA MCU ADC S/H PGA Offset R_sense – Shape Memory Alloy DAC wire • Current generator supplies measuring pulses @40mA • 40mA * Δ 1 Ω = Δ 40mV • Measurement required (typical) is Δ 1 Ω • Δ 40mV*31= Δ 1.240V • Voltage read with 12bit ADC (ref @2.5V) • Measurement has to be amplified by gain factor = 31 • 2.5V / 4096 = 0.6mV

  19. Bill of Material from Spec 19 Analog Conn. Analog Power Supply 6.5V Channel #3 Channel #4 Drive + Drive + USB Conditioning Conditioning Sens conn Stage Stage MCU Channel #1 Channel #2 Drive + Digital Conn. Drive + Conditioning Conditioning Reset Stage Stage PB Digital Power Supply 5V Application Specific Integrated Circuit (ASIC)

  20. Control Waveforms 20 • Each of the SMA wires is driven with a control waveforms consisting of two Ph1 Ph2 phases: f=25 kHz • Ph1: measuring phase  40mA • Ph2: driving phase, PWM mode  90mA Driving Amplitude= 90mA • During Ph2 driving signal is modulated Measuring 40mA by varying the duty cycle of timers Amplitude Ton • The target is to have a maximum of 2mW when doing the measurement to keep the Driving Phase (32 μ s) Measuring Phase (8 μ s) power delivered to the wire as low as possible 2    8 s          2 P R i 33  40 mA  2 mW Driving Phase    40 s • The total resistance variation depend on Measuring the wire length (i.e. 14mm may reach 6Ω) Phase • Generally the requested measurement accuracy is 1mΩ / 1Ω .

  21. Content 21 STMicroelectronics: Who we are Shape Memory Alloy Brief Mechanical Considerations SMA Driving Topology Experimental Results

  22. Experimental Results 22 First step has been emulate SMA wires and SMA based actuator with Matlab / Simulink This has been obtained thanks to tri-lateral collaboration between ST, SAES Getter and Scuola Superiore S. Anna of Pisa

  23. Experiments: Parameter Determination 23 • Only a single wire is powered thus allowing the resistance to leave the associated martensite (R0) value and progress along the SMA resistance curve. This test intends only to follow only a part of the resistance curve and not enter the R MAX austenite region. • Procedure description • Channel 2 is brought to R0 position, i.e. Channel 1 is powered with a fixed duty cycle  Resistance (≈17.3%) in order to straighten Channel 2 wire • DAC for Channel 2 is set in order to output ~2V on the ADC. • A 0.5Hz Saw tooth duty cycle (0% ÷ 10%) waveform is fed on channel 2; measurement Time pulse only on the other channels

  24. Experiments: Hysteresis Curves (1/3) 24 • Hysteresis curve Duty Cycle vs. Voltage is obtained • The range of acquired voltage is [0:4095] ≡Δ 2.5V • With given amplification, considering Δ 1 Ω variation, the range of output voltage is about 1.240V • By performing consecutive acquisition with different DAC values, the hysteresis curved is determined • One wire is supplied with ramp waveform whose frequency and max/min values are modified is several acquisitions Temperature Ch1 DC =DC_MAX DC =DC_MIN DC= DC_MAX DC= DC_MIN time T=1/25KHz time

  25. Experiments: Hysteresis Curves (2/3) 25 • By increasing the frequency, the hysteresis curves results wider, time is not enough for the wire to cool down • opposite channel is power with opposite waveform in order to pull the hot wire DC є [2:15]%, 1Hz DC є [2:20]%, 1Hz DC є [2:20]%, 2Hz DC є [2:20]%, 4Hz DC є [2:20]%, 8Hz V  R Duty Cycle

  26. Experiments: Hysteresis Curves (3/3) 26 • By modifying DAC value the whole hysteresis is exploited Ch1 Ch2 DC= DC_MAX DC= DC_MIN time DAC variation DAC V  R V  R Duty Cycle time

  27. Experiments: Signal Follower 27 • A sophisticated controller has been implemented in firmware, allowing following results: 4 wires driven with ramp waveforms @20Hz, range [2000:3000] Opposite channels Opposite channels

  28. Experimental Results: live video 28

  29. Thank you!

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