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ATLAS DAQ - - PowerPoint PPT Presentation

ATLAS DAQ @J-PARC 2014/11/20-21 for the ATLAS-Japan silicon group Introduction Inner detector in ATLAS


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SLIDE 1

ATLAS 実験シリコン検出器アップグレード の為のテスト用 DAQ システム

計測システム研究会@J-PARC 2014/11/20-21 廣瀬穣 for the ATLAS-Japan silicon group 東工大理工

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SLIDE 2

Introduction

  • Inner detector in ATLAS

➡Purpose :

  • Particle tracking
  • Vertexing

➡Provides very important information for “every” reconstructed objects.

  • ATLAS-Japan group is

involved in the silicon tracker. ➡Pixel detector ➡SemiConductor Tracker (SCT)

2

ATLAS Detector ATLAS Inner Detector

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SLIDE 3

Inner detector in HL-LHC

  • Many problems to use the current design.

➡Intolerable radiation damage

  • Fluence of ~1016 neq/cm2

➡Unacceptable occupancy

  • 23 → 140 pp collisions in one bunch crossing.
  • Completely new design is under study for the upgrade.

3

LHC: L=1x1034 cm-2 s-1 HL-LHC: L = 5x1034 cm-2 s-1

ATLAS Pixel Detector

~year 2015

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SLIDE 4

Overview of the upgraded detector

  • Full silicon tracker.

➡To have high granularity/fast responding detector.

  • Wide coverage of the detector acceptance.

➡Extend up to η<4.0.

  • Many studies are ongoing.

➡Detector R&D, layout, support structure, cooling etc...

4

Concept ring+IBL

New design (Not final) Current design

Center of the detector

pixel pixel SCT SCT TRT

proton beam proton beam

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SLIDE 5

Overview of the upgraded detector

5

Concept ring+IBL

New design (Not final) Current design

| η | < 2 . 5 ( ~ 9 ° ) | η | < 4 . ( ~ 2 ° ) Center of the detector

  • Full silicon tracker.

➡To have high granularity/fast responding detector.

  • Wide coverage of the detector acceptance.

➡Extend up to η<4.0.

  • Many studies are ongoing.

➡Detector R&D, layout, support structure, cooling etc... proton beam proton beam

slide-6
SLIDE 6

Overview of the upgraded detector

6

Concept ring+IBL

New design (Not final) Current design

| η | < 2 . 5 ( ~ 9 ° ) | η | < 4 . ( ~ 2 ° ) Center of the detector

  • Full silicon tracker.

➡To have high granularity/fast responding detector.

  • Wide coverage of the detector acceptance.

➡Extend up to η<4.0.

  • Many studies are ongoing.

➡Detector R&D, layout, support structure, cooling etc...

Japanese group is working mainly on this part.

proton beam proton beam

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SLIDE 7

Work field relating to DAQ

  • Pixel :

➡DAQ development for testing new module design.

  • SCT :

➡DAQ development for testing new module design.

  • Telescope to test the detectors above :

➡DAQ development to readout telescopes.

  • Telescope : reference detector to provide hit position.

➡Software to operate the telescope+DUT system.

7

※DUT : Device Under Test

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SLIDE 8

Work field relating to DAQ

  • Pixel :

➡DAQ development for testing new module design.

  • SCT :

➡DAQ development for testing new module design.

  • Telescope to test the detectors above :

➡DAQ development to readout telescopes.

  • Telescope : reference detector to provide hit position.

➡Software to operate the telescope+DUT system.

8

All these DAQ systems are developed based on the “SEABAS” board.

※DUT : Device Under Test

slide-9
SLIDE 9

Introduction of the SEABAS board

  • SEABAS(2) : general purpose DAQ board with SiTCP

. ➡SiTCP : network processor to communicate with PC. Maximum data rate : 100 (1000) Mbps. ➡FPGA for each user application. ➡2(4)×NIM_IN, 2×NIM_OUT (trigger, busy etc...). ➡1(16)ch×ADC and 4ch×DAC

9

Connectors for each application (120 signal lines from UserFPGA)

UserFPGA SiTCP

Ethernet (via TCP/UDP)

NIM I/O

~ 20 cm

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SLIDE 10

Advantage to use SEABAS

  • “Compact” and “versatile” DAQ system.

➡Compact :

  • Don’t need large crates just for testing prototypes...

✓E.g. NIM, CAMAC, VME, ATCA etc...

  • Portable system is preferable.

✓We have to transport the system for the testbeam. ➡Versatile :

  • Have to test new features of the prototype quickly.

10

SEABAS is one of the good solution !!

  • enough data transfer speed.
  • enough I/O ports.
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SLIDE 11

Pixel module readout

11

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SLIDE 12

Upgrade of the pixel detector

  • Readout ASIC : FE-I3 → FE-I4.

➡Smaller pixel size, faster readout speed.

  • To cope with higher hit rate.

12

20mm 19mm

10.8mm 7.6mm

FE-I3 FE-I4

FE-I3 FE-I4

Pixel array

18×160 80×336

Pixel size (um2) 50×400

50×250

Data rate (Mb/s)

40 160

CMOS process (nm)

250 130

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SLIDE 13

Expected module design

  • Final design for the pixel module uses an multiplexer (MUX).

➡Since module mount have only two data line for one module.

13

Module mount Data line B Data line A

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SLIDE 14
  • Final design for the pixel module uses an multiplexer (MUX).

➡Since module mount have only two data line for one module.

14

FEI4① FEI4② FEI4③ FEI4④

Data line B Module mount

Expected module design

Data line A

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SLIDE 15
  • Final design for the pixel module uses an multiplexer (MUX).

➡Since module mount have only two data line for one module.

15

Data③+④

FEI4① FEI4② FEI4③ FEI4④

MUX MUX

Data①+② Module mount

Expected module design

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SLIDE 16

FEI4-SEABAS2 DAQ system

  • Can readout up to four FEI4s

➡MUX can be used to readout two FEI4s.

16

FEI4×4

Control, analysis ...

4-chip adapter card SEABAS2

LAN

SCC × 4

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SLIDE 17

FEI4-SEABAS2 DAQ system

  • Can readout up to four FEI4s

➡MUX can be used to readout two FEI4s.

17

MUX

  • ptional

FEI4×4

Control, analysis ...

4-chip adapter card SEABAS2

LAN

SCC × 4

slide-18
SLIDE 18

Firmware design

  • To make flexible DAQ system

➡Only provide the interface for ten FEI4 commands.

  • e.g. LV1Trigger, CalibrationPulse, WrRegister etc...

➡All meaningful data from FEI4s is sent to PC.

  • All operation can be done by software coding.

➡Relatively easy for non-DAQ expert to test new things.

18

PC

Control Analysis

SEABAS2 FEI4×4

FIFO0

SiTCP (TCP) FEI4 FEI4 FEI4 FEI4

FIFO1 FIFO2 FIFO3

SiTCP (RBCP) Com.

decoder Command Data

10b→8b 10b→8b 10b→8b 10b→8b

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SLIDE 19

Threshold tuning

  • To set same threshold among pixels.

➡Good example of the operation

  • Needs global configuration.
  • Needs pixel local configuration.
  • Charge injection
  • etc...

19

  • Charge[e]

5000 10000 Hit efficiency 0.2 0.4 0.6 0.8 1 1.2

/ ndf

2
  • 5.685 / 8

Prob 0.6825 Threshold 12.62 ± 2412 Noise 21.83 ± 140.7 / ndf

2
  • 5.685 / 8

Prob 0.6825 Threshold 12.62 ± 2412 Noise 21.83 ± 140.7

(chip,col,row)=(0,34,11)

  • Threshold [e]

2000 4000 6000 8000 10000 # pixels 1 10

2

10

3

10

4

10

5

10

6

10

0.8[e] ± Mean:3596.3 RMS :124.2[e]

Before tuning After tuning

Threshold determination for each pixel

Set global threshold Set local threshold Charge injection × n Extract threshold Save the best DAC value

Repeat

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SLIDE 20

Strip module readout

20

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SLIDE 21

Current/new design of the SCT module

21

  • Shorter strips to cope with high density of the particle.
  • Radiation hard ASIC and sensor.

120 mm 24 mm

768 strips 1280 strips

strip direction strip direction

New design Current design

ACBD R/O ASIC (12 ASICs/module) ABC250 R/O ASIC (80 ASICs/module) Hybrid (Unit of data structure)

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SLIDE 22

DAQ setup

22

  • Relatively large system : readout data from 16 modules.

Hybrid

SEABAS Daughter board

Data from top/bottom side

Detector ladder

  • 16 hybrids on top/bottom
  • (Total 32 hybrids)

16 16

Control, analysis ...

slide-23
SLIDE 23
  • SEABAS is purely used as an interface to pass...

➡“Command bit stream” from PC to each detector. ➡“Hit data” with corresponding ID from detector to PC.

  • Advantage :

➡No firmware development is needed for future prototypes.

23

システムの特徴

 からのコマンドビット列劣をそのままプロトタイプ検出器へ送る  プロトタイプ検出器からの出⼒力曆ビット列劣を のタグ付けのみして へ送る  未加⼯左の出⼒力曆ビット列劣を直接 で確認可能なため、デバッグが容易李

 システム内でビット列劣の変換をしないため 読み出し対象の仕様変更車に容易李に対応可能

日本物理学会 秋期大会 佐賀大学 年憐 ⽉有 ⽇旦

プロトタイプ検出器

SEABAS

… コマンド データ … … PC

User FPGA SiTCP

セットアップ

DAQ design

Picture written by K. Todome

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SLIDE 24
  • Measuring the size of noise.
  • Procedure :

➡Injecting a certain amount of charge. ➡Repeat injection by changing the threshold setting. ➡Fitting the efficiency curve by the error function. ➡Extract parameter σ as the size of noise.

24

Example of the operation

  • !"# $%&'

(√* + = * √- . /−&*1&

%&' 2√* 3

σ=noise

Vthreshold [mV]

εhit [mV]

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SLIDE 25

Result of the noise measurement

  • Tried two ways to measure the noise.

➡Measuring hybrid by hybrid. ➡Measuring whole hybrids at the same time.

25

  • 2

4 6 8 10 12 14 16 500 550 600 650 700 750 800

Top side Bottom side

  • Change to new one
  • Noise [e]

Hybrid ID Hybrid ID

Individual measurement Measuring at the same time

Difference might be caused by the detector design. → Giving a feedback to designers.

?

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SLIDE 26

Telescope development

26

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SLIDE 27

Telescope system for testbeam

27

  • Testbeam is important to check the detector performance.

➡Needed a precise reference detector → silicon telescope.

  • Telescope specification :

➡Four layers of the strip sensor pair with 90° stereo angle. ➡256 strips with 50 um pitch (active region ~ 13×13 mm2) ➡R/O ADC data from each strip by SVX4 ASIC. ➡Expected position resolution of ~3 um.

HUB$ DAQ$PC$

SEABAS$

SEABAS$x2$ Telescopes$ DUT$ Beam$ Ethernet$

table$ 10cm$ Telescopes$ SEABAS$

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SLIDE 28

DAQ software

28

  • Web based GUI interface called SCTJDAC.

➡Independent software modules sharing memory.

  • Fast : thanks to multi-processing.
  • Flexible : composed of software modules.
  • Interface

Online plots

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SLIDE 29

How to synchronize multi-SEABAS

  • Trigger logic unit (TLU).

➡Based on Xilinx Spartan 3AN startarkit. ➡Handling external trigger, busy, veto ... ➡Supplying reference clock to two SEABASs.

  • SEABAS sends data with “TimeStamp” bases on this CLK.

29

  • Spartan startarkit

Extension board

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SLIDE 30

Testbeam @ CERN (Oct. 2014)

30

  • Beam time : 26 Oct. - 3 Nov
  • 120 GeV pion beam from SPS.
  • Acquired ~10 M events

➡Trigger supplied by a fiber tracker. ➡Analysis is ongoing.

Beamtest@CERN$Oct2014$

Telescopes$+$DUT$ SEABAS$ Power$supplies$ NIM$modules$ (For$trigger$logic)$ S$

  • PC (SCT JDAQ)

SVX4 (テレスコープ) SEABAS SEABAS ABCN トリガー 1kHz クロック 100kHz Trigger Logic Unit データ送信可能フラグ 読み出し プロセス イベント再構成 プロセス 読み出し プロセス

  • Fiber

tracker

External trig.

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SLIDE 31

Preliminary result

  • Successfully see the correlation between telescope layers.

31

svx1_ch 50 100 150 200 250 svx4_ch 50 100 150 200 250

correlation_svx_Rear_1_4

Entries 29094 Mean x 148.9 Mean y 138.6 RMS x 60.41 RMS y 64.91 20 40 60 80 100 120 140

correlation_svx_Rear_1_4

Entries 29094 Mean x 148.9 Mean y 138.6 RMS x 60.41 RMS y 64.91

correlation_svx_Rear_1_4

– To ¡increase ¡telescope’s ¡capacity ¡

svx1_ch 50 100 150 200 250

– To ¡increase ¡telescope’s ¡capacity ¡

Layer0 Layer1 Layer2 Layer3 Clear correlation observed !!

Hit ch. on layer3 Hit ch. on layer0

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SLIDE 32

Conclusions

  • Development of the DAQ system for testing future silicon

detectors in ATLAS. ➡For pixel, strip detector. ➡Telescope system to test detectors above.

  • Aiming to develop a compact and versatile system.

➡All DAQ system is based on the SEABAS board. ➡Benefitted from these features.

  • Easily migrated to the new design of modules.
  • Potable for testbeams.
  • Little word about our future plan :

➡Keep using SEABAS. ➡Limitation would be caused by the FIFO size/IO speed(?).

32

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SLIDE 33

Backup

33

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SLIDE 34

External trigger

  • NIM standard input can be used as an external trigger.

➡Maximum DAQ rate : ~400 Hz

  • Example of the data taking with β-source.

➡Scintillator + PMT was used for the trigger signal. ➡Hits by collimated β-ray can be seen as expected.

34

Dark box

45mm

β-source

cover sensor Sci.+PMT collimator (Φ=2.2mm)

0.2 0.4 0.6 0.8 1.2 1.4 1.6 1.8 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 20 40 60 80 50 100 150 200 250 300

h2_hitmapAtLV1Lat_7 Entries 3763 Mean x 0.1669 ± 42.09 Mean y 0.8915 ± 186.2 RMS x 10.24 RMS y 54.69 Integral 3763 3763

100 150 200 250 300

Row Column #hits Hitmap

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SLIDE 35

5 10 15 20 25 30 35 40 45 50 Column 10 20 30 40 50 60 70 80 Row 50 100 150 200 250 300 (Chip,BCID)=(0,0) 2 4 6 8 10 12 14 1000 2000 3000 4000 5000 6000 7000

h1_tot_0_0 Entries 16800 Mean 0.006675 ± 7.494 RMS 0.8652 Underflow Overflow Integral 1.68e+04

5 10 15 20 25 30 35 40 45 50 Column 10 20 30 40 50 60 70 80 Row 50 100 150 200 250 300 (Chip,BCID)=(1,0) 2 4 6 8 10 12 14 1000 2000 3000 4000 5000

h1_tot_1_0 Entries 15964 Mean 0.009604 ± 12.15 RMS 1.213 Underflow Overflow Integral 1.596e+04

Operation with MUX

  • Developed things

➡Firmware : de-multiplexer, data extractor ➡Software : decoder

  • Result of charge injection.

➡Two FEI4s are operated successfully.

35

Chip0 Chip1

Column Column Row Row ToT[/25ns]

Time over threshold(ToT)

Threshold

ToT[/25ns]