Application in a Synthetic Aperture Radiometer E. Ryman (1) (2) , S. - - PowerPoint PPT Presentation

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Application in a Synthetic Aperture Radiometer E. Ryman (1) (2) , S. - - PowerPoint PPT Presentation

Dec 11, 2022 482 likes •726 views

A SiGe 8-Channel Comparator for Application in a Synthetic Aperture Radiometer E. Ryman (1) (2) , S. Back Andersson (1) , J. Riesbeck (1) , S. Dejanovic (1) , A. Emrich (1) , and P. Larsson-Edefors (2) (1) Omnisys Instruments AB (2) Dept. of

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SLIDE 1

A SiGe 8-Channel Comparator for Application in a Synthetic Aperture Radiometer

  • E. Ryman(1) (2), S. Back Andersson(1) , J. Riesbeck(1) , S. Dejanovic(1) ,
  • A. Emrich(1) , and P. Larsson-Edefors(2)

(1)Omnisys Instruments AB (2)Dept. of Computer Science and Engineering, Chalmers

University of Technology

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SLIDE 2

Microwave Sounding from GEO

  • Lack of temperature and moisture distribution
  • Weather models, now-casting

and short range forecasting

  • MW → cloud penetration
  • GEO → continuous coverage
  • GEO + MW → large aperture

2013-05-21 2 ISCAS 2013 LEO GEO

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SLIDE 3

Aperture Synthesis

  • Array of small antennas emulate large antenna
  • Shorter imaging time
  • No time skew problem

from scanning

  • Easier deployment
  • Signal processing

challenge

2013-05-21 3 ISCAS 2013

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SLIDE 4

Cross- correlator

Aperture Synthesis

  • Array of small antennas emulate large antenna
  • Shorter imaging time
  • No time skew problem

from scanning

  • Easier deployment
  • Signal processing

challenge

2013-05-21 4 ISCAS 2013

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SLIDE 5

Synthetic Aperture Instruments

  • GAS (ESA)

– Temperature and water vapor – 380, 183, 118 and 53 GHz – ~136 receivers for 53 GHz band

  • GeoSTAR (NASA)

– Temperature and water vapor – 183 GHz and 50 GHz – Up to 300 receivers for 50 GHz band

2013-05-21 5 ISCAS 2013

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SLIDE 6

64-ch Correlator System Application

2013-05-21 6

Correlator 8x2 8 CML 1:8 LVDS clk 8x2 signal

  • ffset

Bias ctrl data out readout clk readout enable reset correlator enable

ISCAS 2013

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SLIDE 7

Comparator ASIC Features

  • 8 comparator channels
  • 2.5-3.3 V supply range
  • Per-channel offset tuning
  • Flip-flop sampling
  • Clock return
  • Bias control for performance tuning
  • CML outputs with drive strength control

2013-05-21 7 ISCAS 2013

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SLIDE 8

Comparator Schematic

2013-05-21 8

Comparator

DFF

VCM = 0 V

Correlator

VDD = 0.9 V VCC = 0 V VEE = -2.5/-3.3 V VSS = 0 V bias clk adj adj CML CML G G CML bias X8

ISCAS 2013

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SLIDE 9

Gilbert Gain Cell and Input Stage

2013-05-21 ISCAS 2013 9

  • ut

in in cal cal + +

  • +

VCC VEE RL RL RE RE

  • Flat frequency

response

  • Current amplifier
  • Emitter followers move input range

𝐵𝐽 = 1 + 𝐽𝐹

𝐽𝐶

𝑔

3𝑒𝐶 = 𝑔𝑈 𝐵𝐽

𝐵𝑊 = 𝐵𝐽

𝑆𝑀 𝑆𝐹

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SLIDE 10

Latch and CML driver

2013-05-21 ISCAS 2013 10

  • ut

in +

  • +

VCC VEE in

  • clk

clk +

  • ut

in +

  • +

VCC VEE in +

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SLIDE 11

Layout

2013-05-21 ISCAS 2013 11

ch 0 ch 1 ch 2 ch 3 4 2 CML buffers clk clk ret ch 7 ch 6 ch 5 ch 4

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SLIDE 12

Layout

2013-05-21 ISCAS 2013 12

  • 130-nm SiGe HBT

BiCMOS process

  • 1.9 mm2
  • 274 transistors
  • Common centroid

within channels

  • Path-length matching
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SLIDE 13

2013-05-21 13

Measurements

  • Two corners evaluated:

low power (LP) and high performance (HP)

  • Temperature

controlled environment

  • Input power calibrated
  • ver frequency range

ISCAS 2013

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SLIDE 14

Sampling Frequency

1.0 GHz LP corner

2013-05-21 14 ISCAS 2013

4.5 GHz HP corner

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SLIDE 15

Input Offset and Drift

  • Offsets within

10 mV expected (MC simulation)

  • <0.2 mV variation
  • ver 50°C temp

range

  • <2 µV/°C trend

2013-05-21 15 ISCAS 2013

20 40 60 6.5 7 7.5 8 Offset (mV) DUT Temperature (C) HP LP

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SLIDE 16

Timing Results

  • Time skew mitigated at board design level if

required

2013-05-21 16 ISCAS 2013

Clk and data timing (ps) HP LP rise fall skew rise fall skew Data out 99 95 90 176 168 103 Clock return 171 165 189 182

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SLIDE 17

Sensitivity

  • -50 dB crosstalk at 400 MHz
  • ~30 dB CMR
  • Clock sensitivity 50mV @ HP, 150 mV @ LP

2013-05-21 ISCAS 2013 17

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SLIDE 18

Jitter

  • Sine clock: 2.5 GHz @ HP, 1 GHz @ LP
  • 100 kHz Common mode signal

2013-05-21 ISCAS 2013 18

  • 20
  • 10

10 20 4 6 8 10 12 14 Cyc-cyc std-dev (ps) CM power (dBm) Clock common mode induced jitter HP -20 dBm DM HP -10 dBm DM LP -10 dBm DM

  • 20
  • 10

10 20 2 2.5 3 3.5 4 4.5 5 TIE std-dev (ps) CM power (dBm) Signal common mode induced jitter HP -25 dBm DM LP -20 dBm DM

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SLIDE 19

Jitter

  • Sine clock: 2.5 GHz @ HP, 1 GHz @ LP
  • 100 kHz Common mode signal

2013-05-21 ISCAS 2013 19

  • 30
  • 20
  • 10

10 3 4 5 6 7 8 9 Cyc-cyc std-dev (ps) CM power (dBm) Power supply induced jitter HP -10 dBm DM LP -10 dBm DM

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SLIDE 20

64-channel Correlator Power

2013-05-21 20

Correlator 8x2 8 CML 1:8 LVDS clk 8x2 signal

  • ffset

Bias ctrl data out readout clk readout enable reset correlator enable

ISCAS 2013

Cross-correlator: 0.13 mW/prod/GHz Comparator: 48 mW/channel @ HP 17 mW/channel @ LP Sampling + correlation: 1.35 W @ 1 GHz 3.73 W @ 2.5 GHz

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SLIDE 21

Summary

  • High-speed low-power comparator
  • Application-specific features

– Offset tuning – Bias tuning – Clock return – 8-channels – CML output

  • Measurements confirm suitability

for intended application

2013-05-21 21 ISCAS 2013

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SLIDE 22

Q&A

2013-05-21 ISCAS 2013 22

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SLIDE 23

Input DC range

2013-05-21 ISCAS 2013 23

Input DC ranges (V) HP LP min max min max Signal

  • 1.09

1.04

  • 0.53

1.32 Clock

  • 0.67

0.75

  • 0.06

0.75