Application in a Synthetic Aperture Radiometer E. Ryman (1) (2) , S. - PowerPoint PPT Presentation

A SiGe 8-Channel Comparator for Application in a Synthetic Aperture Radiometer E. Ryman (1) (2) , S. Back Andersson (1) , J. Riesbeck (1) , S. Dejanovic (1) , A. Emrich (1) , and P. Larsson-Edefors (2) (1) Omnisys Instruments AB (2) Dept. of Computer Science and Engineering, Chalmers University of Technology

Microwave Sounding from GEO • Lack of temperature and moisture distribution • Weather models, now-casting GEO and short range forecasting • MW → cloud penetration LEO • GEO → continuous coverage • GEO + MW → large aperture 2013-05-21 ISCAS 2013 2

Aperture Synthesis • Array of small antennas emulate large antenna • Shorter imaging time • No time skew problem from scanning • Easier deployment • Signal processing challenge 2013-05-21 ISCAS 2013 3

Aperture Synthesis • Array of small antennas emulate large antenna • Shorter imaging time • No time skew problem from scanning • Easier deployment Cross- correlator • Signal processing challenge 2013-05-21 ISCAS 2013 4

Synthetic Aperture Instruments • GAS (ESA) – Temperature and water vapor – 380, 183, 118 and 53 GHz – ~136 receivers for 53 GHz band • GeoSTAR (NASA) – Temperature and water vapor – 183 GHz and 50 GHz – Up to 300 receivers for 50 GHz band 2013-05-21 ISCAS 2013 5

64-ch Correlator System Application Bias ctrl signal 8x2 8 CML offset 8x2 Correlator correlator enable reset readout enable readout clk data out 1:8 LVDS clk 2013-05-21 ISCAS 2013 6

Comparator ASIC Features • 8 comparator channels • 2.5-3.3 V supply range • Per-channel offset tuning • Flip-flop sampling • Clock return • Bias control for performance tuning • CML outputs with drive strength control 2013-05-21 ISCAS 2013 7

Comparator Schematic V CC = 0 V V DD = 0.9 V Comparator Correlator X8 G G DFF CML V CM = 0 V CML bias CML bias adj clk adj V EE = -2.5/-3.3 V V SS = 0 V 2013-05-21 ISCAS 2013 8

Gilbert Gain Cell and Input Stage • Flat frequency V CC R L R L cal in in cal response out - + - - + + • Current amplifier 𝐵 𝐽 = 1 + 𝐽 𝐹 • 𝐽 𝐶 R E R E 3𝑒𝐶 = 𝑔 𝑈 • 𝑔 𝐵 𝐽 V EE 𝑆 𝑀 • 𝐵 𝑊 = 𝐵 𝐽 𝑆 𝐹 • Emitter followers move input range 2013-05-21 ISCAS 2013 9

Latch and CML driver V CC V CC out - + + out - in in + - in in + + clk clk - + V EE V EE 2013-05-21 ISCAS 2013 10

Layout ch 0 ch 1 2 4 CML buffers ch 2 ch 3 clk ret clk ch 4 ch 5 ch 6 ch 7 2013-05-21 ISCAS 2013 11

Layout • 130-nm SiGe HBT BiCMOS process • 1.9 mm 2 • 274 transistors • Common centroid within channels • Path-length matching 2013-05-21 ISCAS 2013 12

Measurements • Two corners evaluated: low power (LP) and high performance (HP) • Temperature controlled environment • Input power calibrated over frequency range 2013-05-21 ISCAS 2013 13

Sampling Frequency 1.0 GHz LP corner 4.5 GHz HP corner 2013-05-21 ISCAS 2013 14

Input Offset and Drift • Offsets within 10 mV expected 8 (MC simulation) 7.5 Offset (mV) • <0.2 mV variation HP over 50°C temp LP 7 range • <2 µV/°C trend 6.5 0 20 40 60 DUT Temperature (  C) 2013-05-21 ISCAS 2013 15

Timing Results Clk and data HP LP timing (ps) rise fall skew rise fall skew Data out 99 95 176 168 90 103 Clock return 171 165 189 182 • Time skew mitigated at board design level if required 2013-05-21 ISCAS 2013 16

Sensitivity • -50 dB crosstalk at 400 MHz • ~30 dB CMR • Clock sensitivity 50mV @ HP, 150 mV @ LP 2013-05-21 ISCAS 2013 17

Jitter • Sine clock: 2.5 GHz @ HP, 1 GHz @ LP • 100 kHz Common mode signal Signal common mode induced jitter Clock common mode induced jitter 5 14 HP -25 dBm DM 4.5 LP -20 dBm DM Cyc-cyc std-dev (ps) 12 TIE std-dev (ps) 4 10 HP -20 dBm DM 3.5 HP -10 dBm DM 8 LP -10 dBm DM 3 6 2.5 2 4 -20 -10 0 10 20 -20 -10 0 10 20 CM power (dBm) CM power (dBm) 2013-05-21 ISCAS 2013 18

Jitter • Sine clock: 2.5 GHz @ HP, 1 GHz @ LP • 100 kHz Common mode signal Power supply induced jitter 9 8 Cyc-cyc std-dev (ps) 7 HP -10 dBm DM 6 LP -10 dBm DM 5 4 3 -30 -20 -10 0 10 CM power (dBm) 2013-05-21 ISCAS 2013 19

64-channel Correlator Power Bias ctrl Cross-correlator: 0.13 mW/prod/GHz signal 8x2 8 CML Sampling + correlation: offset 8x2 1.35 W @ 1 GHz Correlator 3.73 W @ 2.5 GHz correlator enable reset readout enable readout clk data out Comparator: 1:8 48 mW/channel @ HP LVDS 17 mW/channel @ LP clk 2013-05-21 ISCAS 2013 20

Summary • High-speed low-power comparator • Application-specific features – Offset tuning – Bias tuning – Clock return – 8-channels – CML output • Measurements confirm suitability for intended application 2013-05-21 ISCAS 2013 21

Q&A 2013-05-21 ISCAS 2013 22

Input DC range Input DC ranges (V) HP LP min max min max Signal -1.09 1.04 -0.53 1.32 Clock -0.67 0.75 -0.06 0.75 2013-05-21 ISCAS 2013 23