A Passive Filter Aided Timing Recovery Scheme Faisal A. Musa, - - PowerPoint PPT Presentation

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A Passive Filter Aided Timing Recovery Scheme Faisal A. Musa, - - PowerPoint PPT Presentation

A Passive Filter Aided Timing Recovery Scheme Faisal A. Musa, Anthony Chan Carusone Department of Electrical and Computer Engineering U i University of Toronto it f T t Outline Outline Introduction Introduction Baud-rate timing


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A Passive Filter Aided Timing Recovery Scheme

Faisal A. Musa, Anthony Chan Carusone Department of Electrical and Computer Engineering U i it f T t University of Toronto

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Outline Outline

  • Introduction

Introduction

  • Baud-rate timing recovery (TR) schemes

Passive filter

  • Passive filter
  • Measurement Results
  • Conclusions

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Introduction Introduction

Timing Recovery Techniques Deductive Inductive

CDR

Deductive (e.g. non-linear spectral line) Inductive Linear Non-linear or Bang-bang (e.g. Hogge) Baud-rate Edge-sampled (focus of this work)

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Introduction Introduction

Analog Signal Processor Front-End Data Data Timing Information

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Edge-sampled Baud-Rate

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Introduction Introduction

  • Why baud-rate over edge-sampled?

y g p

  • 1. Reduced clock sampling phases

results in less power in the VCO and p phase detector.

  • 2. Better performance in the presence of

p p ISI and random noise.

[F. Musa and A. Chan Carusone,``Modeling and Design of Multilevel Bang-bang CDRs in the Presence of ISI and g g Noise,’’ IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 54, No. 10, October 2007.]

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Baud-Rate TR Schemes Baud Rate TR Schemes

  • Baud-rate architectures for serial links:

Baud rate architectures for serial links: 1 Integrating front-end based clock recovery 1. Integrating front-end based clock recovery 2 Mueller Muller PD based clock recovery 2. Mueller-Muller PD based clock recovery 3 Minimum Mean Squared Error (MMSE) timing 3. Minimum Mean-Squared Error (MMSE) timing recovery [This work]

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Baud-Rate TR Schemes Baud Rate TR Schemes

  • Integrating Front-End Based PD

[Emami-Neyestanak, A.; Palermo, S.; Hae-Chang Lee; Horowitz, M.;, [Emami Neyestanak, A.; Palermo, S.; Hae Chang Lee; Horowitz, M.;, VLSI Symposium 2004] :

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  • PD requires specific 4-bit patterns
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Baud-Rate TR Schemes Baud Rate TR Schemes

  • Mueller-Muller Timing Recovery

[IEEE Trans. on Comm., 1976; Balan JSSC 2005] [IEEE Trans. on Comm., 1976; Balan JSSC 2005]

[ ]

) ( ) (

2 1 1 b k b k k k k k

T h T h A A X A X − − + ≈ −

− −

τ τ

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  • True only for uncorrelated random data
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SLIDE 9

Baud-Rate TR Schemes Baud Rate TR Schemes

  • MMSE PD based CDR (This work):

] )} ( [{ ] [

2 2 k b k k k

kT y A E e E E τ + − = =

ek

MMSE updates the

MMSE updates the sampling phase, sampling phase, τk

k

p g p , p g p ,

k k

to minimize e to minimize ek

k 2 2:

k

e dE τ τ ] [

2

=

ek

2

k b k k k k k

d kT dy e d τ τ μ τ τ τ τ ) ( 2

1

+ + = − =

+

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τk

k

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Sign-Sign MMSE Sign Sign MMSE

ek

⎥ ⎤ ⎢ ⎡ + + =

k b bb

kT dy e τ θ τ τ ) ( sgn ] sgn[ 2 ⎥ ⎦ ⎢ ⎣ + =

+ k k bb k k

d e τ θ τ τ sgn ] sgn[ 2

1

⇒ Bang bang timing recovery

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⇒ Bang-bang timing recovery

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Baud-Rate TR Schemes Baud Rate TR Schemes

  • Advantages of MMSE:
  • Advantages of MMSE:

More robust than

  • ther

baud-rate techniques since there are no techniques since there are no constraints on the input data.

  • Disadvantages:

R i l d i f ti Requires slope and error information.

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Error-Signal Free Sign-Sign MMSE Error Signal Free Sign Sign MMSE

ek

⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + + =

+ k k k bb k k

d kT dy e τ τ θ τ τ ) ( sgn ] sgn[

1

⎤ ⎡ ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + + + ≈

k k k bb k

d kT dy kT y τ τ τ θ τ ) ( sgn )] ( sgn[ ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + + + ≈

+ k k k bb k k

d kT dy kT y τ τ τ θ τ τ ) ( ) ( sgn

1

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Error-Signal Free Sign-Sign MMSE Error Signal Free Sign Sign MMSE

⎥ ⎤ ⎢ ⎡ + + =

k

kT dy e τ θ τ τ ) ( sgn ] sgn[ ⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + + + ≈ ⎥ ⎦ ⎢ ⎣ + =

+ k k bb k k k bb k k

d kT dy kT y d e τ τ τ θ τ τ θ τ τ ) ( sgn )] ( sgn[ sgn ] sgn[

1

⎥ ⎦ ⎤ ⎢ ⎣ ⎡ + + + ≈

+ k k k bb k k

d kT dy kT y τ τ τ θ τ τ ) ( ) ( sgn

1

⎦ ⎣

k

This work

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Slope Detection Schemes Slope Detection Schemes

I t

Integrate & Dump Slope Lossy Integrators Data

Tb

Input

CLK

Integrate and Dump aided Slope Detector

Slope

∫ ∫

Input

(a) Slope Tb CLK Data (b)

Active Filter aided Slope Detector

(a)

Input

Data (c) Slope

Passive Filter aided Slope Detector [Thi k]

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[This work]

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Choice of RC time constant Choice of RC time constant

  • For 10-Gb/s data, the

RC ti t t RC time constant was chosen to be 10ps: R = 200 Ω, C = 50 fF

Data Slope Data Slope Data

Input

Slope

f 1/2πRC >> 0.5fbit

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Passive Filter Passive Filter

  • Inductors improve

bandwidth without compromising the l ti h hift relative phase shift between the data and slope paths.

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Die Photo Die Photo

0.18 μm CMOS; Die area=1.1 mm2

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Measurement Results Measurement Results

Network Analyzer Measurements: Data Path Bandwidth (Measured)=6-GHz. S21 in Slope Path increases @ 20dB/dec

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S21 in Slope Path increases @ 20dB/dec.

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Measurement Results Measurement Results

DATA PATH OUTPUT SLOPE PATH OUTPUT

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Measurement Results Measurement Results

  • External Timing Recovery:

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Conclusions Conclusions

  • A passive filter that provides simultaneous low-pass

p p p and high-pass characteristics was presented.

  • The high-pass transfer characteristic is utilized to

provide slope information that is aligned with the low- provide slope information that is aligned with the low pass data output.

  • Data and slope signals from the passive filter can be

used to recover a clock based on modified MMSE used to recover a clock based on modified MMSE timing recovery.

  • Prototype

passive filter was used with external 2 GH l k f 2 Gb/ components to recover a 2-GHz clock from a 2-Gb/s 231-1 random data sequence.

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Thank you Thank you

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Passive Filter Passive Filter

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