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Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement A new Balanced Truncation Model Reduction Approach for Large Scale LTI Systems with many Ports Peter Benner and Andr e Schneider Chemnitz University of

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SLIDE 1 System Reduction for Nanoscale IC Design

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement

A new Balanced Truncation Model Reduction Approach for Large Scale LTI Systems with many Ports

Peter Benner and Andr´ e Schneider

Chemnitz University of Technology Faculty of Mathematics

16th South-East-German Colloquium of Numerical Analysis Dresden April 30th, 2010

1/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

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SLIDE 2

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement

SyreNe – An Overview

SyreNe is the abbreviation for the research network System Reduction for Nanoscale IC Design within the program Mathematics for Innovations in Industry and Services funded by the German Federal Ministry of Education and Science (BMBF). Subproject 4 at Chemnitz UT deals with the Reduced Representation of Power Grid Models .

2/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

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SLIDE 3

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement

SyreNe Employees

TU Chemnitz

  • Prof. Dr.

Peter Benner Dipl.-Math. techn. Andr´ e Schneider Dipl.-Math. techn. Thomas Mach Universit¨ at Hamburg

  • Prof. Dr.

Michael Hinze Dipl.-Math. techn. Martin Kunkel Dipl.-Math. Ulrich Matthes TU Braunschweig

  • Prof. Dr.

Matthias Bollh¨

  • fer

Dipl.-Math. techn. Andr´ e Eppler TU Braunschweig

  • Prof. Dr.

Heike Faßbender Juan Pablo Amorocho M.Sc. ITWM Kaiserslautern

  • Dr. Patrick

Lang Dipl.-Math. Oliver Schmidt TU Berlin

  • Dr. Tatjana

Stykel

  • Dr. Andreas

Steinbrecher 3/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-4
SLIDE 4

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement

Outline

1

Introduction Introductory Example The Setting Model Order Reduction

2

Basics Balanced Truncation Solutions of Lyapunov Equations LR-ADI

3

Balanced Truncation for Many Ports Hankel Singular Values Projection Matrices

4

Outlook and Acknowledgement

4/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-5
SLIDE 5

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Wafer Development – Power Grid Model

Typical applications are the simulation of power grids and clock distribution networks.

5/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-6
SLIDE 6

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Wafer Development – Power Grid Model

Typical applications are the simulation of power grids and clock distribution networks.

Source: http://www.swamppolitics.com. 5/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

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SLIDE 7

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Wafer Development – Power Grid Model

Typical applications are the simulation of power grids and clock distribution networks. Recently, use of nano-scale chip manufacturing process (30nm-level), increasing number of (parasitic) elements (Intel Nehalem, 2–4 kernels, 820 millionen transistors, 45 nm), and production of multi-layered ICs, Intel 12

  • layers. (more known?)

Cut through a multilayer board with a BGA. Source: http://de.academic.ru/dic.nsf/dewiki/255301. 5/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-8
SLIDE 8

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-9
SLIDE 9

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-10
SLIDE 10

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-11
SLIDE 11

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-12
SLIDE 12

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-13
SLIDE 13

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-14
SLIDE 14

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-15
SLIDE 15

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Descriptor system

Using the modified nodal analysis (MNA) in general leads to a differential-algebraic equation (DAE) of the implicit form f(x, ˙ x, t) = 0, with det( ∂f

∂ ˙ x) ≡ 0.

The DAE in semi-explicit form leads to a linear time-invariant continuous-time system, called descriptor system, C ˙ x(t) = −Gx(t) + Bu(t), x(0) = x0, y(t) = Lx(t), (1) with C, G ∈ Rn×n, B ∈ Rn×m, LT ∈ Rn×p, x ∈ Rn containing the internal state variables, u ∈ Rm the vector of input variables, y ∈ Rp the

  • utput vector, x0 ∈ Rn the initial value and n the number of state

variables, called the order of the system.

6/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-16
SLIDE 16

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Transfer function

Applying the Laplace transform to the descriptor system leads to rational, matrix-valued function: Definition (Transfer function) The rational, matrix-valued function H(s) = L(sC + G)−1B (2) with s ∈ C is called the transfer function of the continuous-time descriptor system (1). If s = iω, then ω ∈ R is called the frequency. Matrix tupel (C, G, B, L) is called a realization of H(s). Keep in mind, that B and L define the input and output terminals. We want to reduce their number.

7/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-17
SLIDE 17

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Transfer function

Applying the Laplace transform to the descriptor system leads to rational, matrix-valued function: Definition (Transfer function) The rational, matrix-valued function H(s) = L(sC + G)−1B (2) with s ∈ C is called the transfer function of the continuous-time descriptor system (1). If s = iω, then ω ∈ R is called the frequency. Matrix tupel (C, G, B, L) is called a realization of H(s). Keep in mind, that B and L define the input and output terminals. We want to reduce their number.

7/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-18
SLIDE 18

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Transfer function

Applying the Laplace transform to the descriptor system leads to rational, matrix-valued function: Definition (Transfer function) The rational, matrix-valued function H(s) = L(sC + G)−1B (2) with s ∈ C is called the transfer function of the continuous-time descriptor system (1). If s = iω, then ω ∈ R is called the frequency. Matrix tupel (C, G, B, L) is called a realization of H(s). Keep in mind, that B and L define the input and output terminals. We want to reduce their number.

7/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-19
SLIDE 19

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Transfer function

Applying the Laplace transform to the descriptor system leads to rational, matrix-valued function: Definition (Transfer function) The rational, matrix-valued function H(s) = L(sC + G)−1B (2) with s ∈ C is called the transfer function of the continuous-time descriptor system (1). If s = iω, then ω ∈ R is called the frequency. Matrix tupel (C, G, B, L) is called a realization of H(s). Keep in mind, that B and L define the input and output terminals. We want to reduce their number.

7/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-20
SLIDE 20

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Model Order Reduction

Why model order reduction?

8/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-21
SLIDE 21

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Model Order Reduction

Why model order reduction? Answer: efficient computation of the solution (computing time, memory requirements), computability of the solution for very large systems.

8/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-22
SLIDE 22

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Introductory Example The Setting Model Order Reduction

Model Order Reduction

Why model order reduction? Answer: efficient computation of the solution (computing time, memory requirements), computability of the solution for very large systems. Want to find: ˜ C˜ ˙ x = ˜ G˜ x + ˜ Bu(t), x(0) = x0, ˜ y = ˜ L˜ x(t), (3)

  • f degree l ≪ n with output ˜

y ∈ Rp and output error y − ˜ y = Hu − ˜ Hu = (H − ˜ H)u (4) such that y − ˜ y or, respectively,

  • H − ˜

H

  • is “small”.

8/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-23
SLIDE 23

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Idea: The system (1), in realization (C, G, B, L), is called balanced, if the solutions P, Q of the Lyapunov equations GPC + CPGT = BBT , GT QC + CQG = LT L, satisfy: P = Q = diag(σ1, . . . , σn) where σ1 ≥ σ2 ≥ . . . ≥ σn > 0.

9/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-24
SLIDE 24

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Idea: The system (1), in realization (C, G, B, L), is called balanced, if the solutions P, Q of the Lyapunov equations GPC + CPGT = BBT , GT QC + CQG = LT L, satisfy: P = Q = diag(σ1, . . . , σn) where σ1 ≥ σ2 ≥ . . . ≥ σn > 0. {σ1, . . . , σn} are the Hankel singular values (HSVs) of (1).

9/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-25
SLIDE 25

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Idea: The system (1), in realization (C, G, B, L), is called balanced, if the solutions P, Q of the Lyapunov equations GPC + CPGT = BBT , GT QC + CQG = LT L, satisfy: P = Q = diag(σ1, . . . , σn) where σ1 ≥ σ2 ≥ . . . ≥ σn > 0. {σ1, . . . , σn} are the Hankel singular values (HSVs) of (1). A balanced realization is computed via state space transformation

T : (C, G, B, L) → (TCT −1, TGT −1, TB, CT −1) =

  • C11

C12 C21 C22

  • ,
  • G11

G12 G21 G22

  • ,
  • B1

B2

  • ,
  • L1

L2

  • .

9/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-26
SLIDE 26

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Idea: The system (1), in realization (C, G, B, L), is called balanced, if the solutions P, Q of the Lyapunov equations GPC + CPGT = BBT , GT QC + CQG = LT L, satisfy: P = Q = diag(σ1, . . . , σn) where σ1 ≥ σ2 ≥ . . . ≥ σn > 0. {σ1, . . . , σn} are the Hankel singular values (HSVs) of (1). A balanced realization is computed via state space transformation

T : (C, G, B, L) → (TCT −1, TGT −1, TB, CT −1) =

  • C11

C12 C21 C22

  • ,
  • G11

G12 G21 G22

  • ,
  • B1

B2

  • ,
  • L1

L2

  • .

Truncation reduced order model: ( ˆ C, ˆ G, ˆ B, ˆ L) = (C11, G11, B1, L1).

9/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-27
SLIDE 27

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Implementation: SR (square root) Method

1

Compute (Cholesky) factors of the solutions to the Lyapunov equation, P = ST S, Q = RT R.

10/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-28
SLIDE 28

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Implementation: SR (square root) Method

1

Compute (Cholesky) factors of the solutions to the Lyapunov equation, P = ST S, Q = RT R.

2

Compute singular value decomposition SRT = [ U1, U2 ]

  • Σ1

Σ2 V T

1

V T

2

  • .

10/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-29
SLIDE 29

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Balanced Truncation

Implementation: SR (square root) Method

1

Compute (Cholesky) factors of the solutions to the Lyapunov equation, P = ST S, Q = RT R.

2

Compute singular value decomposition SRT = [ U1, U2 ]

  • Σ1

Σ2 V T

1

V T

2

  • .

3

Define W := RT V1Σ−1/2

1

, V := ST U1Σ−1/2

1

.

4

Then the reduced order model is (W T CV, W T GV, W T B, LV ).

10/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

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SLIDE 30

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

Solutions of Lyapunov Equations

GPC + CPGT = BBT , GT QC + CQG = LT L In many applications: [Penzl 99, Ant./Sor./Zhou 02, Grasedyck 04] rank(P, τ) = kP ≪ n, rank(Q, τ) = kQ ≪ n ⇒ Compute low-rank solution factors ˜ S ∈ Rn×kP , ˜ R ∈ Rn×kQ: P ≈ ˜ S ˜ ST , Q ≈ ˜ R ˜ RT . LR-ADI

[Penzl 00, Li/White 02, Benner/Li/Penzl 08]

Smith

[Penzl 00, Antoulas/Gugercin/Sor. 03]

Krylov

[Jaimoukha/Kasenally 94, Saad 90, Simoncini 07]

Sign function method

[Benner/Quintana-Ort´ ı 99,Benner/Baur 06]

20 40 60 80 100 120 140 160 180 200 10

−20

10

−15

10

−10

10

−5

Singular values for P, n = 200 Index j σ j

11/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-31
SLIDE 31

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

LR-ADI

Consider FX + XF T = −GGT ADI iteration for the Lyapunov equation (j = 1, . . . , J) X0 = (F + pjI)Xj− 1

2

= −GGT − Xj−1(F T − pjI) (F + pjI)XT

j

= −GGT − XT

j− 1

2 (F T − pjI) 12/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-32
SLIDE 32

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

LR-ADI

Consider FX + XF T = −GGT ADI iteration for the Lyapunov equation (j = 1, . . . , J) X0 = (F + pjI)Xj− 1

2

= −GGT − Xj−1(F T − pjI) (F + pjI)XT

j

= −GGT − XT

j− 1

2 (F T − pjI)

Rewrite as one step iteration X0 = Xj = − 2pj(F + pjI)−1GGT (F + pjI)−T +(F + pjI)−1(F − pjI)Xj−1(F − pjI)T (F + pjI)−T

12/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-33
SLIDE 33

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

LR-ADI

Consider FX + XF T = −GGT ADI iteration for the Lyapunov equation (j = 1, . . . , J) X0 = (F + pjI)Xj− 1

2

= −GGT − Xj−1(F T − pjI) (F + pjI)XT

j

= −GGT − XT

j− 1

2 (F T − pjI)

Rewrite as one step iteration Z0ZT = ZjZT

j

= − 2pj(F + pjI)−1GGT (F + pjI)−T +(F + pjI)−1(F − pjI)Zj−1ZT

j−1(F − pjI)T (F + pjI)−T

12/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

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SLIDE 34

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

LR-ADI

Zj = [

  • −2pj(F + pjI)−1G, (F + pjI)−1(F − pjI)Zj−1]

[Penzl 00]

+ works on the factors Zi ∈ Rn×rG instead of Xi ∈ Rn×n + fixed number of columns added per step − number of columns to be processed grows in each step

13/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-35
SLIDE 35

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

LR-ADI

Zj = [

  • −2pj(F + pjI)−1G, (F + pjI)−1(F − pjI)Zj−1]

[Penzl 00]

Observing that (F − piI), (F + pkI)−1 commute, we rewrite ZJ as ZJ = [zJ, PJ−1zJ, PJ−2(PJ−1zJ), . . . , P1(P2 · · · PJ−1zJ)],

[Li/White 02]

where zJ =

  • −2pJ(F + pJI)−1G

and Pi := √−2pi √−2pi+1 (F + piI)−1(F − pi+1I).

13/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-36
SLIDE 36

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Balanced Truncation Solutions of Lyapunov Equations LR-ADI

Basics

LR-ADI

Zj = [

  • −2pj(F + pjI)−1G, (F + pjI)−1(F − pjI)Zj−1]

[Penzl 00]

Observing that (F − piI), (F + pkI)−1 commute, we rewrite ZJ as ZJ = [zJ, PJ−1zJ, PJ−2(PJ−1zJ), . . . , P1(P2 · · · PJ−1zJ)],

[Li/White 02]

where zJ =

  • −2pJ(F + pJI)−1G

and Pi := √−2pi √−2pi+1

  • I − (pi + pi+1)(F + piI)−1

.

13/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

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SLIDE 37

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Problem

Why do we fail?

14/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-38
SLIDE 38

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Problem

Why do we fail? Answer: The assumption rank(P, τ) = kP ≪ n, rank(Q, τ) = kQ ≪ n ⇒ Compute low-rank solution factors ˜ S ∈ Rn×kP , ˜ R ∈ Rn×kQ: P ≈ ˜ S ˜ ST , Q ≈ ˜ R ˜ RT , might not hold for one of the gramians of (1) if there are many inputs or many outputs.

14/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-39
SLIDE 39

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Problem

Why do we fail? Answer: The assumption rank(P, τ) = kP ≪ n, rank(Q, τ) = kQ ≪ n ⇒ Compute low-rank solution factors ˜ S ∈ Rn×kP , ˜ R ∈ Rn×kQ: P ≈ ˜ S ˜ ST , Q ≈ ˜ R ˜ RT , might not hold for one of the gramians of (1) if there are many inputs or many outputs. We recall that number of columns in ˜ Si or ˜ Ri grows by kP or kQ in each step. If G ∈ Rn×rG, the LR-ADI iteration is not efficient anymore. ⇒ Need alternative approach!

14/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-40
SLIDE 40

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Hankel Singular Values

We know that the HSVs of SRT = [ U1, U2 ]

  • Σ1

Σ2 V T

1

V T

2

  • are σi = diag(Σ). Assume, w.l.o.g. we have many inputs, i.e., rank(P)

is “large” and SVD is too expensive. But σi are also computable by σi =

  • λi(PQ) =
  • λi(P ˜

R ˜ RT ) =

  • λi( ˜

RT P ˜ R), λi = 0. The gramian P is representable as P = 1 2π ∞

−∞

(jωI − A)−1MM T (jωI − A)−H dω,

[Sontag 98]

with C = CT , A = C−1G, and M = C−1B.

15/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-41
SLIDE 41

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Hankel Singular Values

Inserting this expression for P in ˜ RT P ˜ R, we get ˜ RT P ˜ R = 1 2π ∞

−∞

˜ RT (jωI − A)−1MM T (jωI − A)−H ˜ R dω. (5)

  • Eqn. (5) is cheaply evaluable because:

we can use appropriate quadrature rules, like Gauss-Kronrod, calculating of N(ω) = (jωI − A)−H ˜ R is equivalent to solving a sparse linear system of equations, and we only need matrix vector multiplication of M, M T , N, and N T .

16/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-42
SLIDE 42

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Hankel Singular Values

Inserting this expression for P in ˜ RT P ˜ R, we get ˜ RT P ˜ R = 1 2π ∞

−∞

˜ RT (jωI − A)−1MM T (jωI − A)−H ˜ R dω. (5)

  • Eqn. (5) is cheaply evaluable because:

we can use appropriate quadrature rules, like Gauss-Kronrod, calculating of N(ω) = (jωI − A)−H ˜ R is equivalent to solving a sparse linear system of equations, and we only need matrix vector multiplication of M, M T , N, and N T . Now we know an approximation of ˜ RT P ˜ R but how to get the projection matrices for BT?

16/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-43
SLIDE 43

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement Hankel Singular Values Projection Matrices

Balanced Truncation for Many Ports

Projection Matrices

Use Schur decomposition [B./Baur 08] of ˜ RT P ˜ R ( ˜ RT P ˜ R)Vr = VrΛ1 (6) to get the projection matrices, where Λ1 = diag(λ1, . . . , λr), λi are the r largest eigenvalues of ˜ RT P ˜ R and Vr is a basis for the right dominant invariant subspace. We calculate the left dominant invariant subspace basis Wl by W T

l ( ˜

RT P ˜ R) = Λ1W T

l .

(7) We compute a QR decomposition Vr = QrRr and Wl = QlRl, such that Tr = Qr and Tl = (QT

l Qr)−1QT l .

Then the reduced order model is (TlCTr, TlGTr, TlB, LTr).

17/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-44
SLIDE 44

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement

Outlook and Acknowledgement

Future work will be: implementation of this approach, numerical experiments, an error bound. The work reported in this talk was supported by the German Federal Ministry of Education and Research (BMBF), grant no. 03BEPAE1. Responsibility for the contents of this publication rests with the authors.

18/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports

slide-45
SLIDE 45

Introduction Basics Balanced Truncation for Many Ports Outlook and Acknowledgement

Outlook and Acknowledgement

Future work will be: implementation of this approach, numerical experiments, an error bound. The work reported in this talk was supported by the German Federal Ministry of Education and Research (BMBF), grant no. 03BEPAE1. Responsibility for the contents of this publication rests with the authors.

Many thanks for your attention.

18/18 andre.schneider@mathematik.tu-chemnitz.de

  • A. Schneider

Balanced Truncation MOR for VLSI Systems with many Ports