A Hard Problem In A Boolean Asynchronous Freezing Cellular Automata - PowerPoint PPT Presentation

Cellular automata Recipe Ingredients: ◮ n States ◮ 1 Grid with cells ◮ 1 Neighborhood ◮ 1 Local function Directions: Apply the local function on each cell in parallel (synchronously) once. Repeat until obtain a dynamical system. Remark In general, CA shows a complex behavior.

Asynchronous Cellular Automata An Asynchronous Cellular Automaton is a function F : Q Z d → Q Z d : � f ( F σ ( t − 1) ( x ) N ( z ) ) if z = σ ( t ) F σ (0) ( x ) = x ; F σ ( t ) ( x ) z = x z otherwise. ◮ N ⊂ Z d is called the neighborhood ◮ f is the local function ◮ σ : N → Z d is the update scheme Remark In asynchronous cellular automata only changes one cell at each time step.

Neighborhoods and Boolean Network Main neighborhoods von Neumann Moore neighborhood neighborhood

Neighborhoods and Boolean Network u u t v s t v s w w von Neumann Cellular automata grid Boolean network interaction graph

Neighborhoods and Boolean Network p q p q u u t v s t v s r w x r w x von Neumann Cellular automata grid Moore Cellular automata grid Boolean network interaction graph

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 1 1 2 4 3

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 1 f 1 2 4 3

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 2 f 2 4 3

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 3 f 2 4 3

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 4 f 4

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 5 f

Example: Life without Death. Local funcation of Life without death Or any permutation f : Time 5

Definitions Definition An ACA is freezing if f : � ; ∗ → �

Definitions Definition An ACA is freezing if f : � ; ∗ → � Definition Given a configuration x , a cell z ∈ Z 2 is unstable if ∃ σ, ∃ T : F σ ( T ) ( x ) z � = x z

Definitions Definition An ACA is freezing if f : � ; ∗ → � Definition Given a configuration x , a cell z ∈ Z 2 is unstable if ∃ σ, ∃ T : F σ ( T ) ( x ) z � = x z Definition ( AsyncUnstability F ) F is a FACA. INPUT: A n × n -periodic configuration x and a cell z . QUESTION: Does there exist a updating scheme σ and T > 0 such that F σ ( T ) ( x ) z � = x z ?

History ◮ Prediction problem. Input : F , z , x , q , t , question : F t ( x ) z = q ?. (Banks 1971)

History ◮ Prediction problem. Input : F , z , x , q , t , question : F t ( x ) z = q ?. (Banks 1971) ◮ Given a FCA and a n × n conf. x , F O ( n 2 ) ( x ) is a fixed point. (Goles, Ollinger, Theyssier 2015)

History ◮ Prediction problem. Input : F , z , x , q , t , question : F t ( x ) z = q ?. (Banks 1971) ◮ Given a FCA and a n × n conf. x , F O ( n 2 ) ( x ) is a fixed point. (Goles, Ollinger, Theyssier 2015) ◮ Unstability problem. Input : F , z , x , question : F O ( n 2 ) ( x ) z = x z ?. (Goles, M, Montealegre, Ollinger 2017)

History ◮ Prediction problem. Input : F , z , x , q , t , question : F t ( x ) z = q ?. (Banks 1971) ◮ Given a FCA and a n × n conf. x , F O ( n 2 ) ( x ) is a fixed point. (Goles, Ollinger, Theyssier 2015) ◮ Unstability problem. Input : F , z , x , question : F O ( n 2 ) ( x ) z = x z ?. (Goles, M, Montealegre, Ollinger 2017) ◮ We study boolean FCA with von Neumann neighborhood and we found one “complex”.

History ◮ Prediction problem. Input : F , z , x , q , t , question : F t ( x ) z = q ?. (Banks 1971) ◮ Given a FCA and a n × n conf. x , F O ( n 2 ) ( x ) is a fixed point. (Goles, Ollinger, Theyssier 2015) ◮ Unstability problem. Input : F , z , x , question : F O ( n 2 ) ( x ) z = x z ?. (Goles, M, Montealegre, Ollinger 2017) ◮ We study boolean FCA with von Neumann neighborhood and we found one “complex”. f 2 : Or any permutation ◮ Is f 2 complex in others context too? (today, Asynchronous)

Computational Complexity Definition A decision problem A is NP-Complete if A is in NP and for each problem B in P B can by reduced to A , i.e. there is a φ polynomial s.t. ∀ x , B ( x ) = true ⇔ A ( φ ( x )) = true

Computational Complexity Definition A decision problem A is NP-Complete if A is in NP and for each problem B in P B can by reduced to A , i.e. there is a φ polynomial s.t. ∀ x , B ( x ) = true ⇔ A ( φ ( x )) = true ◮ If A is NP-complete and P � NP, then A �∈ P ◮ Boolean satisfiability problem (SAT) and Circuit SAT are NP-complete x 1 x 2 ¬ ( x 1 ∨ x 2 ) ∧ ( x 1 ∨ ¬ x 2 ) ∨ ∨ ∧

Computational Complexity Definition A decision problem A is NP-Complete if A is in NP and for each problem B in P B can by reduced to A , i.e. there is a φ polynomial s.t. ∀ x , B ( x ) = true ⇔ A ( φ ( x )) = true ◮ If A is NP-complete and P � NP, then A �∈ P ◮ Boolean satisfiability problem (SAT) and Circuit SAT are NP-complete x 1 x 2 ¬ ¬ ∨ ∨ ( x 1 ∨ x 2 ) ∧ ( x 1 ∨ ¬ x 2 ) ∨ ∨ ∧

The Problem We will study the following FACA with von Neumann neighborhood: f 2 : Or any permutation von Neumann neighborhood

The Problem We will study the following FACA with von Neumann neighborhood: f 2 : Or any permutation von Neumann neighborhood Unstability (synchronous version of AsyncUnstability ) is P-complete for f 2 , then the question is :

The Problem We will study the following FACA with von Neumann neighborhood: f 2 : Or any permutation von Neumann neighborhood Unstability (synchronous version of AsyncUnstability ) is P-complete for f 2 , then the question is : Problem Is AsyncUnstability NP-complete for f 2 ?

Previous Works Theorem (Goldschlager 1977) Planar circuit value problem is P-complete.

Previous Works Theorem (Goldschlager 1977) Planar circuit value problem is P-complete. 1 2 3 4 5

Previous Works Theorem (Goldschlager 1977) Planar circuit value problem is P-complete. 1 2 1 2 3 4 3 4 5 5

Previous Works Theorem (Goldschlager 1977) Planar circuit value problem is P-complete. b 1 2 1 a ⊕ ⊕ a 2 3 4 3 ⊕ 4 5 5 b

Previous Works Theorem (Goldschlager 1977) Planar circuit value problem is P-complete. b 1 2 1 a ⊕ ⊕ a 2 3 4 3 ⊕ 4 5 5 { b C

Lemma I South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 , C and S i , where S i sends a value for the South output and the opposite value for the East output and C is a crossing gate.

Lemma I South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 , C and S i , where S i sends a value for the South output and the opposite value for the East output and C is a crossing gate. x i S i ¬ x i

Lemma I South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 , C and S i , where S i sends a value for the South output and the opposite value for the East output and C is a crossing gate. 1 2 3 4 5 6 7 φ ( x 1 , x 2 ) = ¬ x 1 ∨ x 2 S 1 C ⊤ C C C C 1 C S 2 C C ⊤ C C 1 2 2 x 1 x 2 C C ∨ C C C C 3 ⊢ C C ∨ C C C 3 4 5 6 4 ¬ ¬ ∨ ∨ C C C C ∨ C ⊤ 5 C ⊢ C C C ∨ C 7 6 ∨ C C C ⊢ C C ∨ 7

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . (3 , 0) (0 , 3) a b (2 , 4) (3 , 3) (4 , 2) ∧ ∧ ∧ (4 , 3) (3 , 4) ∨ ∨ (4 , 1) (1 , 4) s s (4 , 4) ∨ (6 , 4) (4 , 6) ∧ ∧ (7 , 4) (4 , 7) b ′ a ′

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . (3 , 0) (0 , 3) a b (2 , 4) (3 , 3) (4 , 2) ∧ ∧ ∧ (4 , 3) (3 , 4) ∨ ∨ (4 , 1) (1 , 4) s s (4 , 4) ∨ (6 , 4) (4 , 6) ∧ ∧ X (7 , 4) (4 , 7) b ′ a ′

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . (3 , 0) (0 , 3) a b (2 , 4) (3 , 3) (4 , 2) ∧ ∧ ∧ (4 , 3) (3 , 4) ∨ ∨ (4 , 1) (1 , 4) s s (4 , 4) ∨ (6 , 4) (4 , 6) ∧ ∧ (7 , 4) (4 , 7) b ′ a ′

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . (3 , 0) (0 , 3) a b (2 , 4) (3 , 3) (4 , 2) ∧ ∧ ∧ X X (4 , 3) (3 , 4) ∨ ∨ (4 , 1) (1 , 4) s s (4 , 4) ∨ (6 , 4) (4 , 6) ∧ ∧ (7 , 4) (4 , 7) b ′ a ′

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . (3 , 0) (0 , 3) a ′ b ′ a b s 1 s 2 a b 0 0 ↓ ↓ 0 0 0 0 ↓ → 0 0 (2 , 4) (3 , 3) (4 , 2) 0 0 → ↓ 0 0 ∧ ∧ ∧ 0 0 → → 0 0 0 1 ↓ ↓ 0 1 (4 , 3) (3 , 4) 0 1 ↓ → 0 0 ∨ ∨ (4 , 1) (1 , 4) 0 1 → ↓ 0 0 0 1 → → 0 0 s s (4 , 4) 1 0 ↓ ↓ 0 0 ∨ 1 0 ↓ → 0 0 1 0 → ↓ 0 0 (6 , 4) (4 , 6) 1 0 → → 1 0 ∧ ∧ 1 1 ↓ ↓ 0 1 1 1 ↓ → 1 1 (7 , 4) (4 , 7) 1 1 → ↓ 0 0 1 1 → → 1 0 b ′ a ′

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . (3 , 0) (0 , 3) a b 0 1 2 3 4 5 6 7 (2 , 4) (3 , 3) (4 , 2) 0 0 0 0 ∨ 0 0 0 0 ∧ ∧ ∧ 1 0 0 0 ∨ S ∨ ∨ 0 (4 , 3) (3 , 4) 2 0 0 0 ∨ ∧ 0 ∨ 0 ∨ ∨ (4 , 1) (1 , 4) 3 ∨ ∨ ∨ ∧ ∨ 0 ∨ 0 s s (4 , 4) 4 0 ∧ ∨ ∨ ∨ ∧ ∨ S ∨ 5 0 ∨ 0 0 ∨ 0 0 0 (6 , 4) (4 , 6) 6 0 ∨ ∨ ∨ ∧ 0 0 0 ∧ ∧ 7 0 0 0 0 ∨ 0 0 0 (7 , 4) (4 , 7) b ′ a ′

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . 0 1 2 3 4 5 6 7 0 0 0 0 ∨ 0 0 0 0 1 0 0 0 ∨ S ∨ ∨ 0 2 0 0 0 ∨ ∧ 0 ∨ 0 3 ∨ ∨ ∨ ∧ ∨ 0 ∨ 0 4 0 ∧ ∨ ∨ ∨ ∧ ∨ S 5 0 ∨ 0 0 ∨ 0 0 0 6 0 ∨ ∨ ∨ ∧ 0 0 0 7 0 0 0 0 ∨ 0 0 0 Problem!!!

Lemma II South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . 0 1 2 3 4 5 6 7 0 1 2 3 4 5 6 7 0 0 0 0 ∨ 0 0 0 0 0 0 0 0 ∨ 0 0 0 0 1 0 0 0 ∨ ∨ ∨ 0 1 0 0 0 ∨ ∨ ∨ 0 S S 2 0 0 0 ∨ ∧ 0 ∨ 0 2 0 0 0 ∨ ∧ 0 ∨ 0 3 ∨ ∨ ∨ ∧ ∨ 0 ∨ 0 3 ∨ ∨ ∨ ∧ ∨ 0 ∨ 0 4 0 S ∧ ∨ ∨ ∨ ∧ ∨ 4 0 S ∧ ∨ ∨ ∨ ∧ ∨ 5 0 ∨ 0 0 ∨ 0 0 0 5 0 ∨ 0 0 ∨ 0 0 0 6 0 ∨ ∨ ∨ ∧ 0 0 0 6 0 ∨ ∨ ∨ ∧ 0 0 0 7 0 0 0 0 ∨ 0 0 0 7 0 0 0 0 ∨ 0 0 0

Gates ∨ , ∧ , 0 and S ∨ ∨ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 ∨ ∨ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ∨ ∨ ∨ ∨ ∨ 0 0 0 ∨ ∨ ∨ ∧ ∨ 0 0 0 ∨ ∨ ∨ ∨ ∨ ∨ ∨ ∨ 0 0 0 0 0 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 S ∨ ∨ ∨ 0 0 0 0 ∨ ∨ ∨ ∨ 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 0 0 0 0 ∨ 0 0 0 ∨ ∨ 0 0 0 0 0 0 0 0 0 0 0 0 0 0

0 0 0 0 0 0 0 S ∧ 0 S ∧ ∨ 0 0 C ∨ C Therefore South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i .

Finally... Theorem AsyncUnstability is NP-complete. Remember: South-East grid-embedded circuit SAT is NP-complete, with gates ∧ , ∨ , 0 and S i . ∨ ∧ 0 S

OR gate in f 2

A Hard Problem In A Boolean Asynchronous Freezing Cellular Automata - PowerPoint PPT Presentation

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