Welcome to the 2017 Charm++ Workshop!
Laxmikant (Sanjay) Kale
http://charm.cs.illinois.edu Parallel Programming Laboratory Department of Computer Science University of Illinois at Urbana Champaign
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Welcome to the 2017 Charm++ Workshop! Laxmikant (Sanjay) Kale - - PowerPoint PPT Presentation
Welcome to the 2017 Charm++ Workshop! Laxmikant (Sanjay) Kale http://charm.cs.illinois.edu Parallel Programming Laboratory Department of Computer Science University of Illinois at Urbana Champaign 2017 CHARM++ WORKSHOP 1 A bit of history
http://charm.cs.illinois.edu Parallel Programming Laboratory Department of Computer Science University of Illinois at Urbana Champaign
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– 1D, ..7D – Sparse – Bitvector or string as an index
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Parallel Address Space Processor 3 Processor 2 Processor 1 Processor 0
Scheduler
Message Queue
Scheduler
Message Queue
Scheduler
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Scheduler
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Processor 1
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Processor 0
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Message Queue
A[23].foo(…)
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Processor 2
Scheduler
Message Queue
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Processor 0
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Processor 3
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Message Queue
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Processor 2
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Processor 2
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Processor 1
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Processor 0
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Processor 3
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– Dynamically balance loads – Optimize communication:
– Automatic latency tolerance – Prefetch data with almost perfect predictability
Asynchrony Overdecomposition Migratability Adaptive Runtime System
Introspection Adaptivity
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Application Domain Previous parallelization Scale NAMD Classical MD PVM 500k ChaNGa N-body gravity & SPH MPI 500k EpiSimdemics Agent-based epidemiology MPI 500k OpenAtom Electronic Structure MPI 128k Spectre Relativistic MHD 100k FreeON/SpAMM Quantum Chemistry OpenMP 50k Enzo-P/Cello Astrophysics/Cosmology MPI 32k ROSS PDES MPI 16k SDG Elastodynamic fracture 10k ADHydro Systems Hydrology 1000 Disney ClothSim Textile & rigid body dynamics TBB 768 Particle Tracking Velocimetry reconstruction 512 JetAlloc Stochastic MIP optimization 480
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ü Allows dynamic interaction between the system resource manager or scheduler and the job runtime system ü Meets system-level constraints such as power caps and hardware configurations ü Achieves the objectives of both datacenter users and system administrators
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Charm++ Control
So, you can write one module in Charm++, while keeping the rest in MPI
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2 3
Integrated RTS (Using Charm++ construct or OpenMP pragmas)
Core0 Core1
Message Queue Message Queue Task Queue Task Queue
for ( i = 0; i < n ; i++) { … }
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