Wear-aware Memory Management Scheme for Balancing Lifetime and - - PowerPoint PPT Presentation

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Wear-aware Memory Management Scheme for Balancing Lifetime and - - PowerPoint PPT Presentation

Dec 28, 2022 331 likes •515 views

Wear-aware Memory Management Scheme for Balancing Lifetime and Performance of Multiple NVM slots Presenter's: Yujuan Tan Authors: Chunhua Xiao, Linfeng Cheng, Lei Zhang, Duo Liu, Weichen Liu 1 Background Motivation Design

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SLIDE 1

Presenter's: Yujuan Tan Authors: Chunhua Xiao, Linfeng Cheng, Lei Zhang, Duo Liu, Weichen Liu

Wear-aware Memory Management Scheme for Balancing Lifetime and Performance

  • f Multiple NVM slots

1

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SLIDE 2

目 录

  • Background
  • Motivation
  • Design
  • Evaluation
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SLIDE 3

Background

3

NVM

PCM 3DXPOINT PRAM

PERSISTENT BYTE-ADDRESSABILITY LOW LATENCY HIGH DENSITY

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SLIDE 4

Background

4

100 101 102 103 104 105 106

CPU CACHE RAM SSD HDD NVM

SRAM DRAM PCM NAND magnetic 106 109 1012 1015 1018

NVM PCM Endurance (# of write times) RAM DRAM SSD NAND HDD magnetic

Lifetime limit of NVM

ACCESS TIME (ns)

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SLIDE 5

Motivation

Hardware Wear-Leveling technology for NVM Software Wear-Leveling technology for NVM

5

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SLIDE 6

Hardware Wear-Leveling technology for NVM Software Wear-Leveling technology for NVM

Motivation

6

Single NVM

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SLIDE 7

Motivation

7

Hardware Wear-Leveling technology for NVM Software Wear-Leveling technology for NVM Innovation Point Memory Management for In-Memory File System Extend the lifetime for multiple NVMs Collaborate with Hardware Wear-Leveling for single NVM

Single NVM

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SLIDE 8

Design

8

Wear-Counter Allocation Strategy

  • Recording the number of

writes of each NVM

  • Dynamic aware the wear of

each NVM and be used to adjust the use of each NVM

  • Considering concurrent workload pattern
  • Enhancing lifetime and minimizes the

cost of performance

OVERVIEW

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SLIDE 9

Design

9

Wear Counter

  • Record the total number of writes of

each NVM.

  • Insert auditing code in the file write

path

  • Write-Through (WT) strategy.
  • Write-Back (WB) Strategy.
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SLIDE 10

Design

10

Allocation strategy

  • Per-CPU Free List Lease Use First
  • Counters-Group
  • FreeLists-Group
  • Lease Use First Out strategy.
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SLIDE 11

Design

11

Counters-Group

  • m Counters-Group
  • n global persistent NVM-Counter
  • n local CPU-NVM-Counter
  • Least use first strategy on each

Counters-Group

  • From local wear-leveling to global

wear-leveling

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SLIDE 12

Design

12

FreeLists-Group

  • m FreeLists-Group
  • n local CPU-NVM-FreeList on

FreeLists-Group of each CPU

  • Each local CPU-NVM-FreeList is
  • rganized as a single linked list
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SLIDE 13

Evaluation

13

Configuration 参 数 项 具体配置 OS Ubuntu 16.04 Kernel Linux 4.4.4 CPU Intel i5-6500, 4-Core, 3.20 GHz DRAM 16GB DDR3 2133MHz DRAM NVM 8GB DRAM to emulate 4 NVMs

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SLIDE 14

Evaluation

14

Lifetime

  • Outperform wear-leveling effect by

more than 2600x

  • The lifetime can be prolonged by

2.5x

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SLIDE 15

Evaluation

15

Performance

  • PMFS-WASA-WB basically shows the

best performance in high concurrent workload.

  • PMFS-WASA-WT has the worst

performance.

  • The performance is improved up to 15%

when 16 threads and 64KB block size.

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SLIDE 16

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