The Journey to 5G Francis Chow VP & GM, Communications Business - - PowerPoint PPT Presentation

The Journey to 5G

Francis Chow VP & GM, Communications Business Unit

Standards and Key Technologies

The Targets for 5G

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1,000x mobile data volumes 100x connected device 100x end-user data rates 5x lower latency 10x longer battery life

Virtualisation Massive MIMO MMW Access M2M (low latency) New Waveforms 4G Evolutions Network Architectures Evolutionary Disruptive Evolutionary Disruptive Component Architecture

The Evolution of Long Term Evolution

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4.5G and 5G will have a proliferation of standards to meet diverse requirements

 e.g. coverage vs capacity vs latency

5G Building Blocks (1)

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Massive MIMO New Network deployments Maximizing Spectrum availability

Radio architecture’s that enable computationally intensive/adaptive air interfaces for higher speed/capacity Ultra-dense radio networking, Device to device, dynamic spectrum re-farming Utilizing any spectrum Licensed and Unlicensed to increase coverage and throughput

Integration with Wi-Fi

Utilizing any access technology to improve Mobility Energy & cost efficiency

5G Network

AP

BS

AP

BS CN Non - collocated Collocated

5G Building Blocks (2)

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mmWave System Integration Advanced coding & modulation Interference management

Increased integration of access node and backhaul design for peak data rate or simultaneous connections Advances in coding & modulation to improve spectral efficiency lower latency Additional low latency coordinated processing to improve cell edge data rate & spectral efficiency Frequency band

Peak Rate 1 Gbps Peak Rate 50 Gbps

Cloud, SDN/NFV integration

A flexible and adaptive virtual network reducing cost and time to market

5G Timeline

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Consensus required across multiple standards bodies

 Multiple vendors targeting 2018 Winter Olympics for first 5G target

2012 2013 2014 2015 2016 2017 2018 2019 2020 2021 2022

Requirements, system architecture and key technology studies Standardization and prototyping Trial Deployment WRC12 WRC15 WRC18/19 5G Whitepaper Standardisation, Development, Trial's & Testing Rel 12 Rel 13 Rel 14/15/16…

5G 5G Lite

Meet 5G requirements

2018 Korea Winter Olympics 2020 Tokyo Summer Olympics

Overcoming 5G Challenges

The ABC Curve of Telecom

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Source: Huawei

Future Direction of Operators

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Build Smart Pipe



Intelligence of Network



Smart capacity allocation



Coordinated communication



Application awareness

Provide Cloud Service



OTT competition



Ultra Low-latency and high bandwidth



Move cloud to mobile edge



Hardware Platform Standardization

Network Efficiency Capacity Increase User Experience Network Virtualization Market Creation Business Model

Not Only any Time any Where … But also Any Speed Any Service …

Figure source:: ZTE

CRAN

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Centralized RAN

 BBU Sites Reduction  Lower Cooling cost  Lower Blocking Rate

Coordinated RAN

 Coordinated Multipoint Transmission

and Reception (CoMP)

 Inter-cell interference coordination

Cloud RAN

 Network Virtualization  Load Balance  Multi-RAT  Enable low latency Services

Source: CMRI

UHD Video Steaming Cloud Storage Low Latency App Dynamic BaseStation Interference Cancellation

Key Technologies

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Fronthaul Network

RRU RRU RRU RRU RRU

• Virtualization
• Real-time Cloud
• Acceleration
• Switching
• Interconnect
• CPRI (Compression)
• Optical Transport
• mmWave (E/V band)
• Distributed RRU
• Digital Front end
• L1 Processing

What Is a PLD?

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A programmable logic device (PLD) is a type of semiconductor Most semiconductors can be programmed only once to perform a specific function PLDs are reprogrammable—functions can be changed or enhanced during development or after manufacturing Flexibility Makes PLDs Low er Risk and Faster to Design Than Other Types of Semiconductors

ASIC ASSP

Application Specific Integrated Circuit Application Specific Standard Product Complex Programmable Logic Device Field Programmable Gate Array

PLDs Non-PLDs

CPLD FPGA

Virtualization on Real Time Cloud-RAN

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Multi-RAT stacks and new services Scalable load-balancing soft solution High bandwidth interfaces/ connections Meet real-time challenges with virtualization by FPGA for peripherals, switch and acceleration.

L1 Accelerator

VM VM VM FPGA

External connectivity External connectivity

CPU VM Hypervisor

PCIe/QPI/AXI/…

Interconnect

PCIe/QPI/AXI/… Priority Management Switch L2/3 Accelerator Video/Security Accelerator Other Services Accelerator

Egress Ingress GSM BTS

SW Stack

TD- SCDMA BTS

SW Stack

TD-LTE BTS

SW Stack

Low Latency Services

CDN Cache

Other Services

CloudM vEPC

Acceleration with FPGA

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Performance/Latency

 Accelerate your design or

application by up to 35X faster vs. CPU

 L1 example: Turbo decoder

Greener

 Much Lower power

Portability

 Reuse as SW

Flexibility

 Services Agnostic  Time to Market  New business model

Switching and Interconnect

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Connectivity

• Various Protocols

Switching/Bridge

• Scheduling
• Load Balancing

Network Topology

• Scalability
• Flexible/Programmable
• Backplane management

Fat tree Torus Butterfly

CPRI and CPRI Compression

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CPRI (Common Public Radio interfaces)



High speed data link between Base Band Unit (BB) and Remote Radio Unit (RRU)



Stringent requirement latency and jitter, while retain flexibility => FPGA with Transceivers.

CPRI Compression

 Reduce data throughput between radio and baseband Support more carriers and capacity with the limited fiber resources Latency and performance challenges  Proprietary algorithms

FPGA is the Evolution Enabling Technology

RRU RRU RRU RRU

CPRI CPRI CPRI

BBU

CPRI

Fronthaul over Fiber or mmWave

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Bandwidth and Latency Critical Fronthaul Potentials



Conventional CPRI optical link



CPRI over OTU multiplexing into DWM



CPRI over mmWave modulation.

RRU RRU

CPRI CPRI

RRU RRU RRU RRU RRU RRU

CPRI

RRU E/V Band mmWave

OTN

CPRI over OTN Test Result Altera Microwave Solution

Distributed RRU

CPU Integration reduces size and power Volume drives lower system cost



OEMs need to develop products with multiple variables



Scalable solutions across Hardware and Software

Flexibility for upgrade and PAs



TDS-CDMA => TD-LTE

High-bandwidth interconnects

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DDR3 Interface

Host Debug Interface

Ethernet Baseband Interface (CPRI, OBSAI) Data Converter Interface

Framer

Digital Up conversion

CFR DPD Digital Downconversion

DDR3 Interface

ARM Processor

DPD Algorithm

ARM Processor

O&M Functions

ARM SOC Sub-system

Proliferation of hardware requirements Favor FPGA Flexibility and Scalability

Summary

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The Journey to 5G

 5G innovations  4.5G LTE Path ( LTE- A, U, V, M) in the mean time

C-RAN enables operators to answer some 5G challenges

 Reducing Opex and Manage Capex  Enhance both spectrum and platform efficiency and capacity  Reuse investment for new business

FPGA enables Future Wireless

 Time to market  Scalability and Flexibility

Thank You