System em on a a Programable C Chi hip p (SoPC) Cristian - - PowerPoint PPT Presentation

system em on a a programable c chi hip p sopc
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System em on a a Programable C Chi hip p (SoPC) Cristian - - PowerPoint PPT Presentation

System em on a a Programable C Chi hip p (SoPC) Cristian Sister erna Universidad Nacional San Juan Argentina SoC ICTP 1 Some backgr kgrou ound fro rom you. . Who knows about VHDL/Verilog? Who knows about FPGA? Who knows


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SLIDE 1

System em on a a Programable C Chi hip p (SoPC)

Cristian Sister erna

Universidad Nacional San Juan Argentina

SoC ICTP

1

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SLIDE 2

Who knows about VHDL/Verilog?

SoC ICTP

2

Some backgr kgrou

  • und fro

rom you…. ….

Who knows about FPGA? Who knows about SoC? Who knows about ….. ? Who knows about ‘C’? Who knows about ….. ?

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SLIDE 3

AS ASIC S C SoC C vs System o

  • n

n Programmable Chi Chip

SoPC ASIC SoC

SoC ICTP

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  • Development Time
  • Cost
  • Lack of flexibility
  • Great flexibility
  • Fast time-to-market
  • Upgrade-ability
  • Availability of IP cores
  • Cheap and easy to use development tools

Zynq (Xilinx) Ultra Scale(Xilinx) Stratix (Intel) SmartFusion2 (MicroSemi)

  • Great performance
  • Tiny size
  • Very large amount of logic
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SLIDE 4

Sy System on

  • n Chi

Chip ( (SoC)

System on a Board System on a Chip

Figure from the “The Zynq Book”

SoC ICTP

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SLIDE 5

A SI

SIMP MPLE Vie

iew o

  • f

f an Embed edded ed SoC

Figure from the “The Zynq Book” SoC ICTP

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Processor

Peripheral A Peripheral B Peripheral C Memory Interconnection Bus Interconnection Bus In/Out

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SLIDE 6

A Simple View o ew of the Xilinx Z Zynq SoPC

SoC ICTP

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AXI AXI AXI

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SLIDE 7

Software e Syste stem, Ha Hardwar are Syste stem an and Zy Zynq

Figure from the “The Zynq Book” SoC ICTP

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Peripherals

HLS

(High Level Synthesis)

VHDL/Verilog Third-Party IPs Core Generator

(Simulink)

Peripheral A Peripheral B Peripheral C

Peripherals

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SLIDE 8

Architec ectural al View ew o

  • f the Zy

Zynq

SoC ICTP

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SLIDE 9

SoC C Desi Design Flow

  • w

SoC ICTP

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Requirements Specifications System Design

Software/Hardware Partitioning

Hardware Development & Simulation Software Development & Simulation System Integration and Debug IP Cores Placement &Timing Constraints Software Modules Operating Systems

Vivado IP Integrator Software Development KIT (SDK)

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SLIDE 10

Ha Hardware e and S Software e Lay ayers in a a SoC SoC

Figure from the “The Zynq Book” SoC ICTP

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SDK Export to SDK

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SLIDE 11

IP P Availa labilit ility fo for SoC SoC Desi Designs

SoC ICTP

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