Stability Measurement of 3 CSOs with Tracking DDSs and Two-Sample - - PowerPoint PPT Presentation

SLIDE 1

Stability Measurement of 3 CSOs with Tracking DDSs and Two-Sample COV

10 GHz CSOs

• 2×10–16…10–15 ADEV


at 1…105 s

• Not tested at 100 MHz
• C. E. Calosso1, F

. Vernotte2, V. Giordano2,3,

• C. Fluhr4, B. Dubois4, E. Rubiola1,2,3

1 INRIM, Torino, Italy, 2 Besançon Observatory, France 3 FEMTO-ST Institute, France, 4 FEMTO Engineering, France

TDDS

• 2×10–14/τ ADEV


at 100 MHz

• Statistical limit?

Motivations and Outline Let’s put all things together and play

Statistics

• Scalable
• Challenging instrument


and oscillators

http://rubiola.org

1

French and Italian National Research Councils

SLIDE 2

Liquid-He Sapphire Oscillator

• 3 units operational
• Transportable unit –> stability &

noise validated after roundtrip

• 1 unit in progress
• µHz-resolution synthesis

(2 more units delivered to other labs)

2

T2>T1 T1

nESR nESR

Cr3+ Fe3+ doped Al2O3 mono crystal

ϕ ≈ 5 cm, H ≈ 3 cm

nESR

frequency

T

Magnetic Susceptibility

0.1 ppm 0.2 ppm

20 10 30

∆ƒ, Hz

40

WGH16,0,0 mode at 11.565 GHz

5 6 7 8

temperature, K Whispering Gallery H mode

H E

Paramagnetic temperature compensation 10 GHz resonance Q ≈ 2×109 at 5–7 K Pound-Galani Oscillator

• Pound frequency lock to the cavity
• The same cavity is used in the VCO

ƒm control

• ut

PM

• scillator loop

power detector

ν0 Q

VCO V ~ ν–ν0

SLIDE 3

conductance supporting rods copper braids Temperature stabilised plate Gold plated cavity Top flange Cold head 4K stage low thermal 70K stage

Mechanical & Thermal Engineering

Low-vibe cryogenerator < 2 µm displacement @ 1Hz Cold finger temperature stability 100 mK pk Thermal ballast Low acceleration sensitivity

3

First generation: 6kW three-phase Current generation: 3 kW mono-phase

SLIDE 4

Frequency Synthesis

4

10 GHz 10±3 MHz 10±3 MHz DC

÷20

LP

x4

BP

÷4

÷10 ÷10

LP

100 MHz

• utputs

5 MHz

• utputs

10 GHz

• utputs

Direct

• utput

CSO 9.99 GHz input

LP

2.5 GHz DRO 10 GHz

DDS

250 MHz

word DDS control

10 GHz

LP

5 MHz 100 MHz

10 GHz –10±3 MHz HF/VHF out distribution heterodyne PLL frequency

• ffset

48 bit DDS 9x10–17 resolution 0.9 µHz at 10 GHz

• Resonator engineering —> 10 GHz – 10 MHz ±3 MHz
• Small frequency offset —> DDS is OK
• Uneven frequencies —> No crosstalk

SLIDE 5

Tracking DDS —> Digital PLL

5

b–1 = –110 dBrad2/Hz b0 = 154 dBrad2/Hz

Mixer, Amplifier, and ADC

Clock distribution

FPGA

DDS ADC

ϕ i ϕm

A

Tracking DDS

Servo

A D 9 9 1 2

TDDS —> M. Calligaris, G. A. Costanzo, C. E. Calosso, Proc 2015 IFCS pp.681-683

100 MHz noise budget

DDS Noise —> C. E. Calosso, Y. Gruson, E. Rubiola, Proc 2012 IFCS p.777-782

estimator

x(t) ^

SLIDE 6

AD9912 —> Time-PM Noise

6

Jitter = 700 fsrms σy(τ)=1.5×10-14 @ 1 s fh = 5 Hz

• C. E. Calosso, E. Rubiola, Phase Noise and Jitter in Digital Electronics, arXiv:1701.00094 [physics.ins-det]

at ≥5 MHz

DDS Noise —> C. E. Calosso, Y. Gruson, E. Rubiola, Proc 2012 IFCS p.777-782

Flicker: √k-1 = 5 fs FPGA

DDS ADC

ϕ i ϕm

A

Tracking DDS

Servo

estimator

x(t) ^

SLIDE 7

The 6-Channel TDDS

7

DDS Clock Cyclone III FPGA VoCore2 Linux computer (back side) DC/DC & voltage regulator Ethernet Thermally symmetric design 12 V, 10 W supply Mixer SMA input connectors

6 TDDSs, control unit, and interface in a small instrument

Ethernet RS-232

SLIDE 8

Thermal Image

8

Small dissipation and thermal symmetry improve phase stability

SLIDE 9

Statistics

TIC /ϕM

1 2

TIC /ϕM

3 4

TIC /ϕM

5 6

A B C

x12 x34 x56

2 ) ( ) ( ) , ( τ τ − − ≡ t y t y t z t t t y d ) ( d ) ( x = 2 ) ( ) ( πυ ϕ t t = x

] [ E ) (

, A B y y

z z

B A

= τ σ

2-Sample COV

B

x

2

x

BA

x

21

x

21 n

x

B

y

2

y

BA

y

21

y

21 n

y

B

z

2

z

BA

z

21

z

21 n

z

2 B

σ

2 BA

σ

A B,

σ

2 1

σ

2 21

σ

2 21 n

σ

Oscillator Instrument

Single Delta

Output

Single Delta

Noise

9

AVAR

] [ E ) (

2 2

z

y

= τ σ

Time Interval Counters

SLIDE 10

Statistical Tools

TIC /ϕM

1 2

TIC /ϕM

3 4

TIC /ϕM

5 6

A B C

x12 x34 x56

⎪ ⎩ ⎪ ⎨ ⎧ = = = ] [ E ] [ E ] [ E

2 56 2 2 34 2 2 12 2

z z z

CA BC AB

σ σ σ

2 34 21

] [ E

B

z z σ =

3-Cornered Hat 2-Sample COV

] [ E 2 1

2 56 2 34 2 12 2

z z z

B

− + = ⇒ σ

3-cornered hat with noise-free instruments

Noisy Instruments

] [ 2 1 ] [ E 2 1

2 56 n 2 4 3 n 2 12 n 2 2 56 2 34 2 12

σ σ σ σ − + + = − +

B

z z z 10 At 100 MHz the Time Interval Counter is not an option background noise —> 0

SLIDE 11

1 2 3 4 5 6 x1 x6 x2 x3 x4 x5

6-channel Tracking DDS

A B C

2-Sample COV with TDDS

11

2

k j i jk i

z z z z + − = ←

Channels remapping

] [ E

45 32 2

z z

B =

σ ] [ E

56 4 12 3 2

z z

B =

σ ] [ E 2 1

56 3 12 4 56 4 12 3 2

z z z z

B

+ = σ

First improvement Second improvement

• Expand all terms
• Look at convergence laws
• Room for improvement

We use this —>

SLIDE 12

x1 x6 x2 x3 x4 x5

6-channel Tracking DDS

A B C

• Lange / K&K counters
• 10 GHz outputs
• Different beat notes 


prevent crosstalk

Synth. Synth. Synth.

Counter

ϕAB ϕBC ϕCA

12

• INRIM 6-Ch TDDS
• 100 MHz outputs
• 2-sample covariance

3-cornered hat 2-sample COV

Experiment

SLIDE 13

13

SLIDE 14

Time Domain and ADEV

14

TDDS CSOs drift not removed CSOs drift removed correlated thermal effects

SLIDE 15

2-COV vs 3-CH

15

100 MHz outputs 6-Ch TDDS 2COV Algorithm ≈10 GHz outputs HF beat notes (1…10 MHz) Lange/K&K Counters 3CH Algorithm 10GHz —> 100 MHz synthesizer affects short-term (≤100 s) stability 2COV algorithm and 3CH give the same result

SLIDE 16

Conclusions

16

♇ ☿ ♁ ♃

• ♄

☾

• ♆

⛢

semi-major axes 1-m G shift at gnd level

• Full validation of the 100 MHz output
• 5–400 MHz TDDS range
• Next step: composite clock, 2×10–14/τ DDS limit

τ, s

statistical processing limit

100 MHz carrier