SIST PROGRAM SIST PROGRAM D-ZERO EXPERIMENT D-ZERO EXPERIMENT By - - PowerPoint PPT Presentation

SIST PROGRAM SIST PROGRAM D-ZERO EXPERIMENT D-ZERO EXPERIMENT

By Jefferson OKRAKU By Jefferson OKRAKU Morehouse College Morehouse College Supervised By Geoff SAVAGE Supervised By Geoff SAVAGE Control Systems Group Control Systems Group

Summer Summer

Project

Project

Objective: Objective: To send data to the To send data to the chips on this board chips on this board from a far off location from a far off location … …..and that is exactly ..and that is exactly what happened what happened… …. .

Fermilab and its Accelerators Fermilab and its Accelerators

Main Injector & Recycler Tevatron Chicago ↓ p source Booster p p p p 1.96 TeV CDF DØ

DØ Experiment DØ Experiment

The DØ experiment is focused The DØ experiment is focused

• n precise studies of
• n precise studies of

interactions of protons and interactions of protons and antiprotons at the highest antiprotons at the highest available energies. available energies. DØ detector is one of two DØ detector is one of two large particle detectors here at large particle detectors here at Fermilab. Fermilab. It It’ ’s basically a camera. s basically a camera. Can inspect Zillions of Can inspect Zillions of collisions but records just a collisions but records just a few few

DØ Detector DØ Detector

Calorimeters Calorimeters Tracker Tracker Muon Muon System System Beamline Beamline Shielding Shielding

Electronics Electronics (Boards are in there somewhere)

(Boards are in there somewhere)

protons protons antiprotons antiprotons Silicon Detector Silicon Detector

Silicon Readout Data Flow Silicon Readout Data Flow

The SVX The SVX sequencer sequencer controls SVX controls SVX chips and chips and transfers data transfers data from the SVX from the SVX chips to the chips to the readout crates. readout crates. The SVX chips The SVX chips digitize 128 digitize 128 analog inputs analog inputs from silicon from silicon strip detectors. strip detectors. The SVX The SVX sequencer sequencer controls SVX controls SVX chips and chips and transfers data transfers data from the SVX from the SVX chips to the chips to the readout crates. readout crates. The SVX chips The SVX chips digitize 128 digitize 128 analog inputs analog inputs from silicon from silicon strip detectors. strip detectors.

Movable counting house

Platform

SDAQ 1553 Monitoring 25’ High Mass Cable (3M/50 conductor) Serial Command Link

To silicon detector

S E Q S E Q S E Q

SEQ Controller

MCH2

Optical Link 1Gb/s V R B V R B Pwr PC

VME

PDAQ (L3)

MCH3

Pwr PC 1 5 5 3 V B D

Platform

1553 Monitoring 25’ High Mass Cable (3M/50 conductor)

To silicon detector

S E Q S E Q S E Q

SEQ Controller

MCH2

Optical Link 1Gb/s V R B V R B Pwr PC

VME

PDAQ (L3)

MCH3

Pwr PC 1 5 5 3 V B D

SVX Sequencers are at an SVX Sequencers are at an

• bscure location on the
• bscure location on the

detector. detector. In order to change the In order to change the firmware on any of the firmware on any of the chips, for testing or chips, for testing or

• therwise, someone has
• therwise, someone has

to go down to the to go down to the detector. detector. To do this, they need To do this, they need permission (You can permission (You can’ ’t just t just walk onto the platform). walk onto the platform).

If only we can reprogram If only we can reprogram the boards without going to them the boards without going to them physically? physically?

Problem Problem

Programming FPGA Chips Programming FPGA Chips

FPGA and Firmware FPGA and Firmware

Field Programmable Gate Field Programmable Gate Array. Array. They are s They are semiconductor emiconductor devices containing devices containing programmable logic programmable logic components called "logic components called "logic blocks", and programmable blocks", and programmable interconnects. interconnects. Firmware is a set of Firmware is a set of instructions programmed instructions programmed

• n an FPGA.
• n an FPGA.

Unlike software, it is not Unlike software, it is not loaded from a disk and loaded from a disk and unlike hardware, it can be unlike hardware, it can be modified once installed. modified once installed.

How the chips are connected on How the chips are connected on the board the board

JTAG (Joint Test Action Group) Chain The JTAG chain is a group of FPGAs daisy-chained together via a JTAG interface. A JTAG interface is a special four/five-pin interface added to a chip

From 1553 bus

SVX Sequencer SVX Sequencer

Physics Data OUT Physics Data IN The SVX Sequencer boards are 9U by 280mm circuit boards that reside in slots 2 The SVX Sequencer boards are 9U by 280mm circuit boards that reside in slots 2 through 21 of each of eight through 21 of each of eight Eurocard Eurocard crates crates

1553 Bus and Controller 1553 Bus and Controller

The 1553 bus is a device The 1553 bus is a device which consists of a wire pair which consists of a wire pair that transfers data or power that transfers data or power between computer between computer components inside a components inside a computer computer or between

• r between

computers . computers . The controller operates The controller operates according to a command list according to a command list stored in its local memory to stored in its local memory to direct the bus direct the bus To accommodate the my To accommodate the my program the 1553 driver, program the 1553 driver, the program is tailored to the program is tailored to talk to the bus bit at a time. talk to the bus bit at a time.

Diagram of Process Diagram of Process

Firmware Firmware

Mike Utes Engineer @ D0 Board Designer JAM Player

The old and the new The old and the new

JTAG Chain JAMPLAYER JAMPLAYER

get1553/ put1553

1553 Bus 1553 Chip JTAG Chain

Software: Software: How the JAM PLAYER WORKS How the JAM PLAYER WORKS

Clock (TCK) Timing (TMS) Data Input (TDI) Data Output (TDO)

How long is a millisecond ? How long is a millisecond ? ( (JTAG Timing) JTAG Timing)

Number of Loops vs. Number of Loops per Millisecond

5000 10000 15000 20000 25000 30000 0.00E+00 5.00E+08 1.00E+09 1.50E+09 2.00E+09 2.50E+09 3.00E+09 3.50E+09 4.00E+09 4.50E+09 Number of Loops

• No. of Loops per Millisecond

Power PC processor M 68k processor

43KB 43KB 59KB 48KB 72KB 43KB 43KB

Size of File

7:47 22:07 program 1st chip 3:06 Verify 4th chip 7:00 Verify 3rd and 5th chip 9:47 Verify 2nd and 6th chip 7:01 Verify 1st and 7th chip 123 μs 300 μs get1553 120 μs 300 μs put1553 21:18 55:23 verify whole chain 4:24 12:09 verify 1st chip Power PC M 68k

Time Taken by Processor (Minutes: Seconds)

Action

Things I learned Things I learned

How to use Unix, VXworks, Python How to use Unix, VXworks, Python How a 1553 bus and controller works How a 1553 bus and controller works How the D0 Experiment works How the D0 Experiment works

Acknowledgment Acknowledgment

Geoff Savage Geoff Savage Mike Utes Mike Utes Taka Yasuda Taka Yasuda Jamieson Olsen Jamieson Olsen Mayling Wong-Squires Mayling Wong-Squires Bill Lee and Fritz Barlett Bill Lee and Fritz Barlett Elliot McCrory Elliot McCrory Dianne Engram Dianne Engram Me Me

THE END THE END

No questions? No questions? NICE!!! NICE!!!

Thank you. Thank you.

1553 Bus Driver and Controller 1553 Bus Driver and Controller

To accommodate the a To accommodate the a program the 1553 driver, a program the 1553 driver, a program to talks to the driver program to talks to the driver bit at a time, had to be bit at a time, had to be merged with the Jam Player merged with the Jam Player Software. Software.

1553 bus software Altera Jam Bytecode player Controller Driver