[PPT] - PSP MOSFET model R. van Langevelde, G.D.J. Smit , A.J. Scholten and PowerPoint Presentation

SLIDE 1

Introduction to the

PSP

MOSFET model

R. van Langevelde, G.D.J. Smit, A.J. Scholten and D.B.M. Klaassen
G. Gildenblat, X. Li, H. Wang and W. Wu

MOS-AK, Grenoble, September 16th, 2005

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PSP, MOS-AK, Grenoble, September 16th, 2005 2/50

introduction & history
model structure and contents
physical background
parameter extraction
conclusions
utline
introduction & history
model structure and contents
physical background
parameter extraction
conclusions

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PSP, MOS-AK, Grenoble, September 16th, 2005 3/50

introduction: merger SP and MM11 MOS Model 11

(Philips)

SP

(Penn State)

PSP

SLIDE 4

PSP, MOS-AK, Grenoble, September 16th, 2005 4/50

introduction: motivation

2004: CMC calls for next generation

industrial standard model for compact CMOS modeling

SP (Penn State) and MOS Model 11 (Philips

Research) were both worthy candidates

enhance collaboration rather than

competition

make an even better model

Why PSP?

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PSP, MOS-AK, Grenoble, September 16th, 2005 5/50

introduction: similarities MM11 and SP

are surface-potential-based
are symmetrical w.r.t. drain and source
make a distinction between local (miniset) and

global (maxiset) model parameters

use similar basic equations
are based on mid-point linearization of charges

MOS Model 11 (MM11) and SP are both compact MOSFET models that:

PSP Combines and enhances the best features of MM11 and SP

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introduction: CMC requirements

useful for 90, 65 and 45nm CMOS
model dc-currents + derivatives

– distortion – symmetry

model charges + 1st-order derivative

– including accumulation region for varactors

model noise
model source/drain junctions
model non-quasi-static effects
model gate/substrate resistances

requirements for new standard model:

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PSP, MOS-AK, Grenoble, September 16th, 2005 7/50

introduction: CMC selection procedure

07/2004 candidate models:

selection procedure for next generation model:

BSIM5

UC Berkeley Qinv iterative

EKV

EPFL Qinv iterative

HiSIM

Hiroshima Univ. ψs iterative

PSP

PSU/Philips ψs explicit

model type solution from

10/2005 final selection

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utline
introduction & history
model structure and contents
physical background
parameter extraction
conclusions

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general: structure of PSP temperature scaling model equations

T

    

DS GS SB

V V V local model

    currents

charges noise local parameter set stress scaling W, L geometry scaling SA, SB global par set

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PSP, MOS-AK, Grenoble, September 16th, 2005 10/50

general: physical effects included

non-uniform lateral doping
non-uniform vertical doping
field-dependent mobility
velocity saturation
conductance effects (CLM, DIBL, etc.)
series-resistance
short-channel effects (incl. RSCE)
narrow-width effects
gate poly-depletion
quantum-mechanical corrections

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general: physical effects included (ii)

overlap capacitances (ψs-based)
impact ionization current
gate leakage current
gate-induced drain/source leakage (GIDL, GISL)
junction diode I-V and C-V (forward and reverse)
diode reverse breakdown
noise (1/f, thermal, induced gate and shot noise)
non-quasi-static effects
gate and bulk resistances
STI stress effect

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general: PSP’s unique features

unique description of CLM in halo-doped devices

– reproduces details in long channel gds

unique gate current model
unique noise model

– most complete and robust – correctly including velocity-saturation

unique NQS model

– verified against channel segmentation

unique junction diode model (JUNCAP2)

unavailable outside PSP context; verified against device simulations and several modern CMOS processes

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introduction & history
model structure and contents
physical background
parameter extraction
conclusions
utline

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DC model
AC model
noise model
non quasi static model
junction diode model
DC model
AC model
noise model
non quasi static model
junction diode model
utline: physical background

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physics: DC: surface-potential-based

Idrift = f(VGB ,ψs0 ,ψsL) Idiff = g(VGB ,ψs0 ,ψsL) IDS = Idrift + Idiff ψs-based model:

single equation for whole operation range:

1 2 10-11 10-10 10-9 10-8 10-7 10-6 10-5 10-4

Idiff I drift

IDS= Idrift+ Idiff

VSB = 0 V VDS = 1 V VGS (V) IDS (A)

PSP is surface-potential (ψs) based

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physics: DC: ψs-calculation

        − ⋅ +         − ⋅ ⋅ + =         − −

− − −

1 1

T s T s T B

T T s 2 s FB GB ϕ ψ ϕ ψ ϕ ϕ

ϕ ϕ ψ γ ψ e e e V V

V

0.4

0.4 0.8 1.2

1

1 2

V GB - V FB (V) ψs (V)

V = 0 V

[R. Rios et al., IEDM2004]: approximation of ψs becomes inaccurate for high positive back bias

ψs obtained from explicit

analytical approximation, accurate within 1nV under all relevant conditions

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physics: DC: ψs–based model ψs-calculation: description of ideal long-channel MOSFET

mobility reduction
velocity saturation
short-channel effects (DIBL, non-ideal slope)
gate current

in ‘real’ device:

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physics: DC: mobility reduction mobility reduction due to phonon, surface- roughness, and Coulomb scattering

E eff µ

b b inv C

Q Q Q + ∝ µ

3 1 eff ph −

∝ E µ

2 eff sr −

∝ E µ

Si inv b eff

ε η Q Q E ⋅ + − =

PSP:

PH
SR
CS
parameters:

( )

THEMU eff

MUE E ⋅

BETN, MUE, THEMU, CS, XCOR

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0.0 0.4 0.8 1.2 50 100 V

GS (V)

g

m (

µ A/V)

physics: DC: mobility reduction (ii) measurement

gm versus VGS (100µm/10µm n-MOS, VDS=30mV)

VGS (V) gm (µA/V)

VSB=0V VSB=1.2V

model

CS switched

ff

0.0 0.4 0.8 1.2 50 100 V

GS (V)

g

m (

µ A/V)

VGS (V)

CS switched

n

gm (µA/V)

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physics: DC: velocity saturation

in PSP:

integration of v

along channel

parameters:

∫

⋅ ⋅ ⋅ − = x v Q L W I d

inv D

E x v

sat

v v =

|| sat ||

1 E v E v ⋅ + ⋅ = µ µ

2 || sat ||

1       ⋅ + ⋅ = E v E v µ µ

v = µ · E||

THESAT, (THESATG, THESATB)

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0.0 0.4 0.8 1.2 2 4 V

GS (V)

I

D (mA)

0.0 0.4 0.8 1.2 2 4 V

DS (V)

I

D (mA)

physics: DC: velocity saturation (ii) PSP VDS (V) VGS (V) ID (mA) ID (mA) measurement ID vs VGS ID vs VDS

10/0.12 n-MOS VGS=1.2V VGS=0.8V VGS=0.4V VDS=1.2V 0.6V 50mV

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0.0 0.4 0.8 1.2 10

5

10

4

10

3

10

2

10

1

V

GS (V)

g

m

i (A/V i )

0.0 0.3 0.6 0.9 10

3

10

2

10

1

V

DS (V)

g

DSi (A/V i )

gmi (= ∂iID/ ∂VGS

i) vs VGS

VGS=1.2V

physics: DC: velocity saturation (iii) VDS (V) VGS (V) gDSi (A/Vi) gmi (A/Vi) measurement PSP

10/0.12 NMOS gDSi (= ∂iID/ ∂VDS

i) vs VDS

VDS=1.2V

gm1 gm2 gm3 gDS1 gDS2 gDS3

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PSP, MOS-AK, Grenoble, September 16th, 2005 23/50

physics: DC: short-channel effects

Si 2 2 2 2

ε ρ ψ ψ − = ∂ ∂ + ∂ ∂ y x

Poisson equation:

Si A 2 2 2 2

ε ψ ψ N q y x ⋅ ≈ ∂ ∂ + ∂ ∂

(in subthreshold)

2 2 Si A 2 2

x N q y ∂ ∂ − ⋅ ≈ ∂ ∂ ψ ε ψ

Si eff 2 2

ε ψ N q y ⋅ ≈ ∂ ∂

non-ideal subthreshold slope and DIBL (due to 2D-effects): lateral gradient factor f:

( )

SB DS GS A eff

, , V V V f N N ⋅ =

-
++++++

n+ p n+

- -- - - --

+++

n+

- -
-
-- -
-
-
-
-
-
y

x - -

-
++++++

n+ p n+

- -- - - --

+++

n+

- -
-
-
-
-- -
-
-
-
-
-
-
-
-
-
-
-
y

x

PSP-parameters: F0, AF, BF, CF, (CFB)

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physics: DC: channel length modulation

VG VD Nsub uniformly doped device VD VG Npck Npck Nsub pocket implanted device VDS electron potential

in PSP:

effect of pockets on

conductance included

both below and above

threshold

parameters: ALP1, ALP2

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physics: DC: CLM (ii)

0.0 0.4 0.8 1.2 0.00 0.05 0.10 0.15 0.20 V

DS (V)

I

D (mA)

ID-VDS and gDS-VDS for VSB=0V and T=25°C 10µm/10µm NMOS (90nm process) ID (mA)

VDS (V)

0.0 0.4 0.8 1.2 10

7

10

6

10

5

10

4

V

DS (V)

g

DS (A/V)

gDS (A/V)

VDS (V)

SLIDE 26

PSP, MOS-AK, Grenoble, September 16th, 2005 26/50

physics: DC: CLM (iii)

ID-VDS and gDS-VDS for VSB=0V and T=25°C 10µm/0.1µm NMOS (90nm process)

0.0 0.4 0.8 1.2 2 4 6 V

DS (V)

I

D (mA)

ID (mA)

VDS (V)

0.0 0.4 0.8 1.2 10

4

10

3

10

2

10

1

V

DS (V)

g

DS (A/V)

gDS (A/V)

VDS (V)

SLIDE 27

PSP, MOS-AK, Grenoble, September 16th, 2005 27/50

physics: DC: gate leakage current

Gate EV Oxide Oxide EC Ei EF Substrate

x

V q ⋅

B

q χ ⋅

Gate EV Oxide Oxide EC Ei EF Substrate

x

V q ⋅

B

q χ ⋅ gate current density: tunneling probability

( )

x

G

V P F J ⋅ ∝

S

Esaki-Tsu supply function

PSP-parameters: IGINV, IGOV, GC0, GC2, GC3

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PSP, MOS-AK, Grenoble, September 16th, 2005 28/50

1.E-14 1.E-13 1.E-12 1.E-11 1.E-10 1.E-09

1.5
1
0.5

0.5 1 1.5

V GS (V) I G (A)

Measurements MM11

I GB I GS+ I GD I GOV

physics: DC: gate leakage current (ii)

gate leakage model includes 3 components:

S S D D I IG

G

IGD IGS IGB IGOV

gate-to-channel current
gate-overlap current
gate-to-bulk current

model measurements

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PSP, MOS-AK, Grenoble, September 16th, 2005 29/50

physics: DC: gate leakage current (iii)

IG-VGS curves for VSB = 0 V and T = 25 °C

0.36µm/0.1µm NMOS (CMOS-90)

IG (A) VGS (V)

VDS=25mV VDS=1.0V

model measurements

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PSP, MOS-AK, Grenoble, September 16th, 2005 30/50

utline: physical background
DC model
AC model
noise model
non quasi static model
junction diode model

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physics: AC: intrinsic charges

-
+ + + + + +

n+ p n+

- - - - - - -

+ + +

n+

- -
-
- - -
-
-
-
-
-
∫

⋅ ⋅ =

L

x Q W Q

gate G

d

∫

⋅ ⋅ ⋅ =

L

x Q L x W Q

inv D

d

∫

⋅ ⋅       − ⋅ =

L

x Q L x W Q

inv S

d 1

G S D B

Q Q Q Q − − − =

intrinsic capacitances: :

       ≠ ∂ ∂ − = ∂ ∂ = j i V Q j i V Q C for for

j i j i ij

where i, j =G, S, D or B

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physics: AC: intrinsic charges (ii)

2

L

s s m

ψ ψ ψ + =

linearization at mid-point bias: which allows for simple charge expressions

Vds = 2V Vbs= 0 V Vfb=-1V

1

1 2 3 4 0.0 0.3 0.6 0.9 Linearized CSM Original CSM Cdg Cbg Csg Cgg

Normalized Transcapacitances Vgs (V)

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physics: AC: intrinsic charges (iii)

0.4 0.8 1.2

3
2
1

1 2 3

V GS (V) C GG (nF)

Measurements MOS Model 11

tox=3.6nm

gate depletion effect

0.4 0.8 1.2

3
2
1

1 2 3

V GS (V) C GG (nF)

Measurements MOS Model 11

tox=3.6nm

quantum-mechanical

effects

0.4 0.8 1.2

3
2
1

1 2 3

V GS (V) C GG (nF)

Measurements MOS Model 11

tox=3.2nm

charge model includes:

accumulation

PMOS, VDS=0 V, W/L=80*612/2.5µm

model

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physics: noise

1/f noise
thermal noise
induced gate noise
shot noise in gate current
shot noise in impact ionization current

noise model in PSP includes: + correlation HF noise model in PSP has the same accuracy as the segmentation approach

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PSP, MOS-AK, Grenoble, September 16th, 2005 35/50

results for 90nm CMOS gate-source bias [V] Sid , Sig [A2/Hz]

NMOS VDS=1.0V f=10GHz L=0.1µm

physics: noise: thermal/induced gate noise

measurement PSP model

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PSP, MOS-AK, Grenoble, September 16th, 2005 36/50

physics: NQS model

unified model for AC and transient simulations
spline-collocation based solution of current-

continuity equation

consistent with quasi-static model, includes all

terminal currents, and all operation regions

includes velocity saturation, channel length

modulation, poly-depletion, and QM effects

implemented in Verilog-A via CV subcircuits
no additional (fit-)parameters
similar to SP but further developed

NQS model in PSP

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physics: NQS: subcircuit implemention

      ⋅ ⋅ − = ⋅ = x V q x x I W t q d d d d d d 1 d d

i D i

µ

+ spline approximation system of (coupled) differential equations

( )

N 1 k k

, , u u f dt du K − =

implemented as sub-circuits, solved by circuit simulator:

( ) ( )

2 1 2 2 2 1 1 1

, , , V V f f V V f f = =

C R C R Cf1 Cf2 V1=u1 V2=u2

R is large carries negligible current

Example: (N = 2) current continuity equation

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physics: NQS : results

1E9 1E10 1E11 0.6 0.8 1.0 1.2 1.4 1E7 1E8 1E9 1E10 1E11

180
150
120
90
60
30

QS NQS with N=1 NQS with N=2 NQS with N=3 NQS with N=5 NQS with N=9

L=1µm Tox=4nm Nsub=2E17cm

3

|ym|/gm

Frequency (Hz)

L=1µm Tox=4nm Nsub=2E17cm

3

QS NQS with N=1 NQS with N=2 NQS with N=3 NQS with N=5 NQS with N=9

Phase (degree) Frequency (Hz)

normalized transconductance Ym versus f

magnitude of Ym phase of Ym

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physics: NQS : results (ii)

VDS=1.5 V VGS=0.5 V VGS=1.0 V VGS=1.5 V PSP, SWNQS=5 MM11, 5 segments

Re(Y11) versus f

VDS=1.5 V VGS=0.5 V VGS=1.0 V VGS=1.5 V measurement QS model NQS model

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physics: NQS : resistor subcircuit

D RG G S B Rjun,S Rjun,D Rbulk Cjun,S Rwell Cjun,D

PSP NQS

JUNCAP2 JUNCAP2

SLIDE 41

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3 components: bottom/STI-edge/gate-edge
physics based

– depletion capacitance

– ideal current – Shockley-Read-Hall – trap-assisted tunneling – band-to-band tunneling – avalanche & breakdown – shot noise

physics: diode: JUNCAP2 model JUNCAP2: A new junction diode model

forward & reverse

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PSP, MOS-AK, Grenoble, September 16th, 2005 42/50

bottom STI-edge gate-edge

physics: diode: I-V curves

T=-400C T=2000C

0.12µm CMOS, n+/p-well

ideal BBT SRH+TAT

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introduction & history
model structure and contents
physical background
parameter extraction
conclusions
utline

SLIDE 44

PSP, MOS-AK, Grenoble, September 16th, 2005 44/50

parameters: structure of PSP temperature scaling model equations

T

    

DS GS SB

V V V local model

    currents

charges noise local parameter set stress scaling W, L geometry scaling SA, SB global par set

SLIDE 45

PSP, MOS-AK, Grenoble, September 16th, 2005 45/50

parameters: parameter extraction

local parameters for each dut geometry scaling global parameter set

P

temperature scaling measurements

0.1 0.15 0.2 0.25 5 10 15

local global

1/LE (1/µm) P

ptional fine-tuning by fitting on multiple duts

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PSP, MOS-AK, Grenoble, September 16th, 2005 46/50

availability of PSP (in public domain)

PSP-code (vA and SiMKit)

–April 2005: first release –August 2005: optimized version

PSP code developed in Verilog-A; two modules:

–QS model –extended code incl. NQS and gate/bulk resistors

C-code in SiMKiT (automatically generated from vA-code

using ADMS)

–interface to Pstar, Spectre, ADS, and UltraSim –interface to Aplac in progress

PSP-homepage: pspmodel.ee.psu.edu
www.semiconductors.philips.com/Philips_Models
future plans: self-heating, binning, and PD-SOI

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PSP, MOS-AK, Grenoble, September 16th, 2005 47/50

availability of PSP (ii) circuit simulator PSP available

Spectre (Cadence) yes ADS (Agilent) yes Hspice (Synopsis) 09/2005 (β version: 07/2005) HSIM (Synopsis) next release NanoSiM (Synopsis) 03/2006 Eldo (Mentor Graphics) 10/2005 (β version: 08/2005) Spice (Berkeley) 09/2005 (from PSP-homepage)

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acknowledgements

Colin McAndrew and Laurent Lemaître

from Freescale

Geoffrey Coram from Analog Devices

we would like to thank: compact modeling work at Penn State is supported in part by SRC, Freescale and IBM

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PSP, MOS-AK, Grenoble, September 16th, 2005 49/50

selected references

JUNCAP2 model

– A.J. Scholten et al., IEDM 2005

NQS model

– H. Wang et al., TED 2003 – H. Wang et al., CICC 2005

noise model

– R. van Langevelde et al., IEDM 2003 – J. Paasschens, TED 2005 (accepted).

SLIDE 50

PSP, MOS-AK, Grenoble, September 16th, 2005 50/50

PSP combines and enhances the best features of

MM11 and SP

PSP provides accurate description of I-V and C-V

characteristics over complete bias, temperature and geometry range

PSP provides accurate description of RF

characteristics including noise and NQS effects

PSP satisfies all CMC benchmark tests

conclusions

http://pspmodel.ee.psu.edu

SLIDE 51