Probabilistic Graphical Models Sangho Youn 1 and Chenjie Gu 2 1 Seoul - - PowerPoint PPT Presentation

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Probabilistic Graphical Models Sangho Youn 1 and Chenjie Gu 2 1 Seoul - - PowerPoint PPT Presentation

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1 Probabilistic Bug Localization for Analog/Mixed-Signal Circuits using Probabilistic Graphical Models Sangho Youn 1 and Chenjie Gu 2 1 Seoul National University, South Korea 2 Intel Strategic CAD Labs, Hillsboro, OR, USA March 2014 2 Outline

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SLIDE 1

Probabilistic Bug Localization for Analog/Mixed-Signal Circuits using Probabilistic Graphical Models

Sangho Youn1 and Chenjie Gu2

1Seoul National University, South Korea 2Intel Strategic CAD Labs, Hillsboro, OR, USA

March 2014

1

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SLIDE 2

Outline

  • Overview
  • Bug localization using graphical models
  • Graphical model creation
  • Gaussian Bayesian network
  • Table-based Bayesian network
  • Bug localization by statistical inference
  • Experimental results
  • Conclusion

2

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SLIDE 3

Problem: Time-Consuming Debugging

  • Debugging tasks are major bottlenecks in IC design
  • Mostly depends on trial-and-errors
  • Takes a significant amount of time!

3 http://www.eeweb.com/rtz/trial-error

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SLIDE 4

TX RX Channel IN OUT

Goal: Automatic Bug Localization

  • Goal is to develop a tool that can automatically localize bugs

from available waveforms and models, primarily for post- silicon validation

Closed eye, Failure! Which block caused this failure ?

4

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SLIDE 5

TX RX Channel IN

A B

OUT

θ1 θ2 θ3

Proposed Approach: Bug Diagnosis Using Probabilistic Graphical Models

  • 1. Construct probabilistic graphical model
  • 2. Make an observation
  • 3. Estimate the posterior probability of a

system’s parameter θ

  • 4. If Ppost(θ in θspec_range) < threshold, θ

and its associated sub-block are reported as failure root-causes

  • If multiple bug root-causes are found, rank them

according to P(θ=θref|Dob) 5

θ3 Ppost(θ3|Dob) Ppost(θ1|Dob) θ1 Ppost(θ2|Dob) θ2 θ3 Ppost(θ3|Dob) θ 3,ref Ppost(θ1|Dob) θ1 θ 1,ref Ppost(θ2|Dob) θ2 θ 2,ref

too low!

IN IN A A B B OUT OUT θ1 θ1 θ2 θ2 θ3 θ3 IN A A B B OUT θ1 θ1 θ2 θ2 θ3 θ3

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SLIDE 6

Ppost(θ2|Dob) θ2 θ 2,ref

Advantages of Our Approach

  • Uncertainty/noise can be

modeled

  • Non-linearity can be modeled
  • Efficient inference algorithms

exist

6

too low!

IN A A B B OUT θ1 θ1 θ2 θ2 θ3 θ3

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SLIDE 7

Outline

  • Overview
  • Bug localization using graphical models
  • Graphical model creation
  • Gaussian Bayesian network
  • Table-based Bayesian network
  • Bug localization by statistical inference
  • Experimental results
  • Conclusion

7

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SLIDE 8

Probabilistic Models

  • A system’s behavior can be described by probability

instead of a functional relationship

8

P( IN, B, C, OUT, θ1, θ2 ,θ3 )

This is difficult to characterize!

TX RX Channel IN B C OUT

θ1 θ2 θ3

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SLIDE 9

Probabilistic Graphical Model

  • We can significantly reduce the

complexity by graphical model

  • Can decompose a full joint distribution into

small factors

9

TX RX Channel IN B C OUT

θ1 θ2 θ3

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SLIDE 10

Two Parametric Model of Factors in Graphical Model

  • Conditional Probability Density (CPD)
  • A template to describe CPD, P(Zout|Xin,Yin)

1.

Gaussian Bayesian network (GBN)

  • P(Z | X, Y) ~ Normal (aX+bY, ϭ2)
  • For linear block

2.

Table-based Bayesian network (TBN)

  • P(Z | X, Y) ~ Multinomial (p1,p2,…,pk)
  • For nonlinear block

Gaussian BN Multinomial BN P(Z|X,Y)

10

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SLIDE 11

Gaussian Bayesian Network (GBN) Model Example – Continuous Time Linear Equalizer

  • CTLE example

P(yn|xn,xn-1,yn-1,yn-2)

11 𝐼 𝑡 = 𝑕𝑛 𝐷𝑞 (𝑡 + 1 𝑆𝑡𝐷𝑡) (𝑡 + 1 + 𝑕𝑛𝑆𝑡 2 𝑆𝑡𝐷𝑡 )(𝑡 + 1 𝑆𝐸𝐷𝑞)

𝐼 𝑨 = 𝐿 𝑐0 + 𝑐1𝑨−1 1 + 𝑏1 + 𝑏2𝑨−1 𝑧𝑜 = 𝑐0𝑦𝑜 + 𝑐1𝑦𝑜−1 + 𝑏1𝑧𝑜−1 + 𝑏2𝑧𝑜−2

Discrete-time GBN 𝝂 = 𝒄𝟏𝒚𝒐 + 𝒄𝟐𝒚𝒐−𝟐 + 𝒃𝟐𝒛𝒐−𝟐 + 𝒃𝟑𝒛𝒐−𝟑

yn

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SLIDE 12

Time (n) Time (n) Voltage Voltage

Table-Based Bayesian Network (TBN) Model Creation – Decision Feedback Equalizer

  • DFE example

P(y[n]|x[n]=6,z[n-1]=-1,z[n-2]=-1) P(y[n]|x[n]=5,z[n-1]=1,z[n-2]=-1) P(y[n]|x[n]=3,z[n-1]=-1,z[n-2]=-1)

x[n]=input y[n]=slicer’s input z[n]=output 12

z-1 z-1 x x z z y y

x[n] x[n] z[n] z[n] z[n-2] z[n-2] γ γ z[n-1] z[n-1]

y[n] y[n] x[n] x[n] x[n-1] x[n-1] x[n-2] x[n-2] Slicer threshold Slicer threshold

Quantization levels Quantization levels Time (n) Time (n)

1 1 2 2 3 3 4 4 5 5 6 6 7 7 8 8

Voltage Voltage

z[n] z[n]

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SLIDE 13

Outline

  • Overview
  • Bug localization using graphical models
  • Graphical model creation
  • Gaussian Bayesian network
  • Table-based Bayesian network
  • Bug localization by statistical inference
  • Experimental results
  • Conclusion

13

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SLIDE 14

Bug Localization by Statistical Inference: Computing Pposterior (θ | Dob)

  • We want to estimate the probability of a

parameter (θ) after observation (Dob) by statistical inference

  • Possible Approaches
  • Exact inference
  • Junction tree algorithm
  • Approximate inference
  • Gibbs sampling

14

How do we get Pposterior(θ | Dob) ?

Ppost(θ2|Dob) θ2 θ 2,ref

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SLIDE 15

Statistical Inference by Gibbs Sampling: Computing Pposterior (θ | Dob)

  • Gibbs Sampling can be used when the conditional

distribution of each variable is known and is easy to sample from

1.

Start with an initial guess X0=(B1,0, B2,0, …, θ3,0)

2.

Take a sample B1,1 from P(B1| B2,0, B3,0, …, θ3,0) and update B1

3.

Take samples for B2 to B3 and update them

4.

Take a sample θ1,1 from P(θ1| B1,0, …, θ2,0, θ3,0) and update θ1

5.

Take samples for C1 to C3 and update them

6.

Take samples θ2 to θ3 and update them

7.

Iterate 2~6 step N times

8.

Estimate Ppost(θ | Dob) ~ Histogram(Samples)

  • P(θ1 | Dob) ~ Histogram(θ1,k+1, θ1,k+2, …θ1,k+N)

15

(B1,1, B2,1, …, C1,1, C2,1, …, θ3,1) (B1,2, B2,2, …, C1,2, C2,2, …, θ3,2) (B1,N, B2,N, …, C1,N, C2,N, …, θ3,N)

…

IN1 B1 C1

OUT1

IN2 B2 C2

OUT2

IN3 B3 C3

OUT3 θ1 θ1 θ2 θ2 θ3 θ3

IN1 B1,0 C1,0

OUT1

IN2 B2,0 C2,0

OUT2

IN3 B3,0 C3,0

OUT3 θ1,0 θ2,0 θ3,0

IN1 B1,1 C1,0

OUT1

IN2 B2,0 C2,0

OUT2

IN3 B3,0 C3,0

OUT3 θ1,0 θ2,0 θ3,0

IN1 B1,1 C1,0

OUT1

IN2 B2,1 C2,0

OUT2

IN3 B3,0 C3,0

OUT3 θ1,0 θ2,0 θ3,0

IN1 B1,1 C1,0

OUT1

IN2 B2,1 C2,0

OUT2

IN3 B3,1 C3,0

OUT3 θ1,0 θ2,0 θ3,0

IN1 B1,1 C1,0

OUT1

IN2 B2,1 C2,0

OUT2

IN3 B3,1 C3,0

OUT3 θ1,1 θ2,0 θ3,0

IN1 B1,1 C1,1

OUT1

IN2 B2,1 C2,1

OUT2

IN3 B3,1 C3,1

OUT3 θ1,1 θ2,1 θ3,1

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SLIDE 16

Increasing Accuracy by Using Controllability

  • The method may miss a bug root-cause due to highly

limited observability

  • However, we can increase accuracy and differentiate bug

root-causes by using controllability

16 Spec-range

θ2

Now, the bug can be detected!

controllable knob

P(θ2|Dob1, Dob2)

Dob1=(IN1,OUT1) Dob2=(IN2,OUT2)

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SLIDE 17

Outline

  • Overview
  • Bug localization using graphical models
  • Graphical model creation
  • Gaussian Bayesian network
  • Table-based Bayesian network
  • Bug localization by statistical inference
  • Experimental results
  • Conclusion

17

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SLIDE 18

Test Case – A 5 Gbps I/O Link

  • System Parameters (θ)
  • TX FFE, Channel, RX CTLE : pole / zero
  • DFE: tap coefficients / slicer threshold

18

FR408 GBX Reference Backplane Continuous Time Linear Equalizer

S-parameter channel model is from http://www.t11.org/ftp/t11/models/index.html

TX FFE TX EQ

Output

Channel Channel Output CTLE RX EQ

Output

DFE/Slicer Output Input

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SLIDE 19

Experiment (1) – The Posteriors Cover True Parameters As Expected

  • Posterior distributions of FFE, channel and CTLE parameters and true

parameter locations

19

Zero map of TX FFE Pole/Zero map of channel Pole/Zero map of CTLE

True pole/zero location (x / o) Estimated posterior distribution of pole/zero (x / o)

TX FFE TX EQ

Output

Channel Channel Output CTLE RX EQ

Output

Input

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SLIDE 20

Experiment (2) – The Problematic Buggy Channel Can be Identified

20

  • In this experiment, a channel is replaced by a problematic

lossy channel

Frequency response of lossy channel Frequency response of desired channel

TX FFE TX EQ

Output

Channel Channel Output CTLE RX EQ

Output

DFE/Slicer Output Input

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SLIDE 21

θ3 Ppost(Vgain1|Dob) θ 3,ref Ppost(θ1|Dob) θ1 θ 1,ref Ppost(θ2|Dob) θ2 θ 2,ref

The Bug Localization and Ranking Procedure

21

Ranking

  • Rank them according to P(θ in θspec|Dob)
  • P(θ2 in θ2,spec|Dob) < P(θ1 in θ1,spec|Dob) < …
  • Rank in order of θ2, θ1, …

A11 B11 C11 D11 A12 B12 C12 D12 A21 B21 C21 D21 A22 B22 C22 D22 Vgain2 OUT12 OUT11 θCTLE2 OUT22 OUT21 θCH θCH Vgain1 γ-table θCTLE1 A11 B11 C11 D11 A12 B12 C12 D12 A21 B21 C21 D21 A22 B22 C22 D22 Vgain2 OUT12 OUT11 θCTLE2 OUT22 OUT21 θCH θCH Vgain1 γ-table θCTLE1

Problematic Parameter

TX FFE TX EQ

Output

Channel Channel Output CTLE RX EQ

Output

DFE/Slicer Output Input

controllability to CTLE’s zero location

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SLIDE 22

Experiment (2) – A Buggy Lossy Channel is Identified As the Bug Root-Cause

Estimated parameter posterior

  • f buggy channel

real(z) real(p1)

Desired Parameter Value (Narrow bar) Desired pole(x)/zero(o) locations Estimated posterior distribution of pole/zero (x / o)

22

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SLIDE 23

Conclusion

  • Under limited observability, the proposed bug

method can automatically localize bugs

  • Nonlinearity and uncertainty could be well reflected
  • Can leverage controllability
  • Can rank multiple bug root-causes

23 Bug Diagnosis: Does Posterior cover a desired spec-range?

Pposterior (θ | Dob)

IN2 A2 B2

C2

IN3 A3 B3

C3

A100 B100

C100 IN100 OUT2 OUT3 OUT100

IN1 A1 B1

C1 OUT1 γ-table θFFE θCH Vgain