SLIDE 11 Seite 11
Page 21 Roland Thewes • “CMOS Sensor Arrays for Bio Molecule and Neural Tissue Interfacing” • 13 February 2009 • Dallas, TX
5 15 25 35 1.E-12 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 Input Current [A] Gain error [%] 10-11 10-10 10-9 10-8 10-7 10-6 Test current [A] 10-12 10 20 30 40
sensor bias voltage sensor test / calibration current input test / cal. enable GND VSS VSS
VDD VDD
Example CMOS + Au Processing
Device / Circuit Properties after Au Processing + Extra Annealing Steps
Simple test circuit used for 100-fold current gain
test input. Specified sensor current: 10-12 A – 10-7 A
5 15 25 35 1.E-12 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 Input Current [A] Gain error [%] no anneal 350°C, 30min 400°C, 30min . 10-11 10-10 10-9 10-8 10-7 10-6 Test current [A] 10-12 10 20 30 40
sensor bias voltage sensor test / calibration current input test / cal. enable GND VSS VSS
VDD VDD
no anneal H2/N2, 350° C, 30 min H2/N2, 400° C, 30 min
Sufficient behavior after additional H2/N2 annealing step after Au processing
Page 22 Roland Thewes • “CMOS Sensor Arrays for Bio Molecule and Neural Tissue Interfacing” • 13 February 2009 • Dallas, TX
1 µm
3 µm 3 µm 3 µm
square resistance Au lines [mΩ/square] resistance via holes (Al to Au) [mΩ] square resistance Al 2 lines [mΩ/square] interface state density [1/cm2] CMOS only (i.e. without Au process)
CMOS + Au process, no anneal 48 370 79 ~ 2 × 1011 CMOS + Au process, N2/H2 anneal with 350°C, 30 min 51 360 76 < 1010 CMOS + Au process, N2/H2 anneal with 400°C, 30 min 61 340 74 < 2 × 109
- F. Hofmann et al., IEDM 2002
Definition of a Final Process Window
Considering frontend + backend parameters
350°C, 30 min 400°C, 30 min no annealing