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Memory Virtualization: Swapping and Demand Paging Policies 1 - - PowerPoint PPT Presentation
University of New Mexico Memory Virtualization: Swapping and Demand Paging Policies 1 University of New Mexico Beyond Physical Memory: Policies Memory pressure forces the OS to start paging out pages to make room for actively-used pages.
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Memory pressure forces the OS to start paging out pages
Deciding which page to evict is encapsulated within the
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Goal in picking a replacement policy for this cache is to
The number of cache hits and misses let us calculate the
𝐵𝑁𝐵𝑈 = 𝑄𝐼𝑗𝑢 ∗ 𝑈𝑁 + (𝑄𝑁𝑗𝑡𝑡 ∗ 𝑈𝐸)
Arguement Meaning 𝑈
𝑁
The cost of accessing memory 𝑈
𝐸
The cost of accessing disk 𝑄𝐼𝑗𝑢 The probability of finding the data item in the cache(a hit) 𝑄𝑁𝑗𝑡𝑡 The probability of not finding the data in the cache(a miss)
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Leads to the fewest number of misses overall
Serve only as a comparison point, to know how close we
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Reference Row
1 2 1 3 3 1 2 1
Access Hit/Miss? Evict Resulting Cache State Miss 1 Miss 0,1 2 Miss 0,1,2 Hit 0,1,2 1 Hit 0,1,2 3 Miss 2 0,1,3 Hit 0,1,3 3 Hit 0,1,3 1 Hit 0,1,3 2 Miss 3 0,1,2 1 Hit 0,1,2 Future is not known.
𝐼𝑗𝑢𝑡 𝐼𝑗𝑢𝑡+𝑁𝑗𝑡𝑡𝑓𝑡 = 𝟔𝟓. 𝟕%
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Pages were placed in a queue when they enter the system. When a replacement occurs, the page on the tail of the
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Reference Row
1 2 1 3 3 1 2 1
Access Hit/Miss? Evict Resulting Cache State Miss 1 Miss 0,1 2 Miss 0,1,2 Hit 0,1,2 1 Hit 0,1,2 3 Miss 1,2,3 Miss 1 2,3,0 3 Hit 2,3,0 1 Miss 3,0,1 2 Miss 3 0,1,2 1 Hit 0,1,2 Even though page 0 had been accessed a number of times, FIFO still kicks it out.
Hit rate is
𝐼𝑗𝑢𝑡 𝐼𝑗𝑢𝑡+𝑁𝑗𝑡𝑡𝑓𝑡 = 𝟒𝟕. 𝟓%
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We would expect the cache hit rate to increase when the
2 4 6 8 10 12 14 1 2 3 4 5 6 7 Page Fault Count Page Frame Count
Reference Row
1 2 3 4 1 2 5 1 2 3 4 5
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Picks a random page to replace under memory pressure.
Access Hit/Miss? Evict Resulting Cache State Miss 1 Miss 0,1 2 Miss 0,1,2 Hit 0,1,2 1 Hit 0,1,2 3 Miss 1,2,3 Miss 1 2,3,0 3 Hit 2,3,0 1 Miss 3 2,0,1 2 Hit 2,0,1 1 Hit 2,0,1
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Sometimes, Random is as good as optimal, achieving 6
10 20 30 40 50 1 2 3 4 5 6 Frequency Number of Hits
Random Performance over 10,000 Trials
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Lean on the past and use history.
Historical Information Meaning Algorithms recency The more recently a page has been accessed, the more likely it will be accessed again LRU frequency If a page has been accessed many times, It should not be replcaed as it clearly has some value LFU
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Replaces the least-recently-used page. Reference Row
1 2 1 3 3 1 2 1
Access Hit/Miss? Evict Resulting Cache State Miss 1 Miss 0,1 2 Miss 0,1,2 Hit 1,2,0 1 Hit 2,0,1 3 Miss 2 0,1,3 Hit 1,3,0 3 Hit 1,0,3 1 Hit 0,3,1 2 Miss 3,1,2 1 Hit 3,2,1
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Each reference is to a random page within the set of
Hit Rate Cache Size (Blocks) OPT LRU FIFO RAND
100% 80% 60% 40% 20% 20 40 60 80 100
The No-Locality Workload
When the cache is large enough to fit the entire workload, it also doesn’t matter which policy you use.
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Exhibits locality: 80% of the reference are made to 20% of
The remaining 20% of the reference are made to the
Hit Rate Cache Size (Blocks) OPT LRU FIFO RAND
100% 80% 60% 40% 20% 20 40 60 80 100
The 80-20 Workload
LRU is more likely to hold onto the hot pages.
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Refer to 50 pages in sequence.
Hit Rate Cache Size (Blocks) OPT LRU FIFO RAND
100% 80% 60% 40% 20% 20 40 60 80 100
The Looping-Sequential Workload
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To keep track of which pages have been least-and-
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How would we implement actual LRU?
Require some hardware support, in the form of a use bit
Clock Algorithm – OS visits a small number of pages
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The algorithm continues until it finds a use bit that is set
When a page fault occurs, the page the hand is pointing to is inspected. The action taken depends on the Use bit Use bit Meaning Evict the page 1 Clear Use bit and advance hand The Clock page replacement algorithm
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Clock algorithm doesn’t do as well as perfect LRU, it does
Hit Rate Cache Size (Blocks) OPT LRU Clock FIFO RAND
100% 80% 60% 40% 20% 20 40 60 80 100
The 80-20 Workload
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The hardware include a modified bit (a.k.a dirty bit)
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The OS has to decide when to bring a page into memory. Presents the OS with some different options.
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The OS guess that a page is about to be used, and thus
Page 3 Page 4 Page 5 Page n Page 1 is brought into memory
Physical Memory
…
Secondary Storage
Page 1 Page 2 Page 3 Page 4 … Page 2 likely soon be accessed and thus should be brought into memory too
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Collect a number of pending writes together in memory
Page 1 Page 2 Page 3 Page 4 Page 5 Page n Pending writes
Physical Memory
…
Secondary Storage
Page 1 Page 2 Page 3 Page 4 … write in one write
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Should the OS allocate more address space than physical
What should we do when memory is oversubscribed
Trashing CPU Utilization Degree of multiprogramming