Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR
Presentation by Eric Newberry and Youssef Tobah Paper by Dmitry Evtyushkin, Dmitry Ponomarev, and Nael Abu-Ghazaleh
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Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR Presentation by Eric Newberry and Youssef Tobah Paper by Dmitry Evtyushkin, Dmitry Ponomarev, and Nael Abu-Ghazaleh 1 Motivation Buffer overflow attacks modify the control flow of a
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○ Exploit unsafe writes to overwrite the stack pointers ○ Function returns to the location specified by the attacker
○ No eXecute (NX) page bit - prevents non-code memory pages from being executed ○ Address space location randomization (ASLR) - Randomizes some bits in virtual addresses
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○ No special privileges ○ No memory disclosures
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Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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○ On Intel Haswell processors, cache tag is only a portion of the upper-order address bits, while virtual addresses are 48 bits
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○ Only causes slowdown if target addresses of branches in attacker and victim differ ○ Intel states incorrect BTB prediction causes 8 cycle IF bubble ○ Average measured time over multiple attempts for increased accuracy
Spy T2 Spy T1 Victim T2 55.76 cycles 69.38 (+11.12) cycles Victim T1 64.93 (+9.17) cycles 58.26
Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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attacker process
address (out of 48) are fixed
but using only the upper-order portions of the last 31 bits for the BTB tag gets around this issue (at least on Intel Haswell processors)
similar to userland processes
kernel due to syscalls
Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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○ Determines offset for physical memory location of kernel ○ Same offset is applied to virtual memory
Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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○ Allocate buffer ○ Load with code containing branch and time-measurement instruction ○ Activate kernel branch ○ Activate spy branch ○ Measure time taken to execute spy branch
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○ Increases speed ○ Reduces noise
○ 50 measurements collected at each address ○ Attack done in 60 milliseconds
Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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○ Targets victim process with branch instruction ○ Makes list of potential addresses ○ Allocates buffer at address ○ Forces victim to call branch and use BTB ○ Spy runs jump multiple times and measures time ○ Measures again with spy branching to different target
Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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Load all cores with dummy processes, except core with victim and spy Have spy run on every core
Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR” Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
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○ Bits 12 to 40 randomized ○ Only 18 bits used in BTB
○ Further optimizations could improve performance
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Evtyushkin et al, “Jump Over ASLR: Attacking Branch Predictors to Bypass ASLR”
○ Finer grained ASLR ○ Fuzzing timing measurements ○ For KASLR, randomize higher order bits for every process launch
○ Full virtual address for accessing BTB ○ For kernel, add secret value to BTB hash function ■ Use different hash value for each process ○ Flush BTB on context switches ○ Each BTB could be marked with process ID
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○ Cache side channels (many works) ○ Branch predictor attack to get secret keys (Aciicmez et al) ○ Branch predictor attack to build inter-process communication channel (Evtyushkin et al)
○ Brute-force attacks (Shacham et al) ○ Memory disclosure attacks (Roglia et al) ○ Attacking KASLR by causing cache collisions b/w kernel and userland processes (Hund et al) ○ TLB manipulation attack to reveal kernel memory pages (Hund et al)
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○ Essentially reduces difficulty of a brute force attack
○ This would be useful on older systems designed before this side channel was discovered.
○ Particularly during debugging?
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