High Temperature, Smart Power Module for Aircraft Actuators Khalil E - - PowerPoint PPT Presentation

High Temperature, Smart Power Module for Aircraft Actuators

Khalil EL FALAHI, Stanislas HASCOËT, Cyril BUTTAY, Pascal BEVILACQUA, Luong-Viet PHUNG, Dominique TOURNIER, Bruno ALLARD, Dominique PLANSON

Laboratoire Ampère, Lyon, France

8/7/13

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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The More Electric Aircraft

◮ Increase in on-board electric power:

◮ More than 1 MW for the B787 ◮ Need for higher voltage network: 540 V DC

◮ Electric actuators in harsh environment:

◮ Jet engine controls

(e.g. thrust reverser controls)

◮ Electric brakes

Requirements:

◮ Strong thermal cycling

(-55/+200° C)

◮ Long operating life

(target 30 years)

◮ Excellent reliability

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High Temperature Inverter building blocks

Power module:

◮ 6 JFETs in an hermetic package ◮ TA = 200◦C, Iout = 6 A per phase,

20 kHz < FSW < 300 kHz Gate drivers

◮ Integrated technology (SOI) ◮ Development of many functions

◮ Output buffer, signal conditionning ◮ Safety functions ◮ Temperature compensation

EMI filter

◮ Characterization of passives for wide

temperature operation (25/250° C)

◮ Evaluation of long-term ageing

(>1000 h at 200° C)

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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Overview of SiC Power Devices

MOSFET

◮ Easy to drive, much like a silicon MOSFET ◮ “Normally-off” device ◮ Gate oxide reliability issues at high temperature

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Overview of SiC Power Devices

MOSFET

◮ Easy to drive, much like a silicon MOSFET ◮ “Normally-off” device ◮ Gate oxide reliability issues at high temperature

JFET

◮ “Mature” device ◮ No gate oxide, making it very reliable at high temperature ◮ The chosen device is a “Normally-on” device

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Overview of SiC Power Devices

MOSFET

◮ Easy to drive, much like a silicon MOSFET ◮ “Normally-off” device ◮ Gate oxide reliability issues at high temperature

JFET

◮ “Mature” device ◮ No gate oxide, making it very reliable at high temperature ◮ The chosen device is a “Normally-on” device

BJT

◮ Reliability affected by substrate material quality ◮ “Normally-off” ◮ Driving not as simple as with FET devices

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Forward characteristic of the SiCED JFET

2 4 6 8 10 12 Drain-to-Source voltage [V] 10 20 30 40 50 60 70 Drain current [A]

• 50◦C -10◦C 27◦C

70◦C 107◦C 160◦C 196◦C 234◦C 270◦C

ID(VDS) characteristic for VGS = 0 V

◮ 4.08×4.08 mm2 SiC die ◮ Purchased in 2009 ◮ Manufactured by SiCED ◮ Normally-on

(off for Vgs < −21 V)

◮ Tested up to 300°

C

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Gate Characteristic

VGS is limited by punch-through

◮ Depends on current

capability of the driver

−30 −25 −20 −15 −10 VGS voltage [V] −1.0 −0.8 −0.6 −0.4 −0.2 0.0 Gate current [mA]

• 50◦C
• 30◦C
• 10◦C

10◦C 30◦C 50◦C 70◦C 90◦C 110◦C 130◦C 150◦C 170◦C 190◦C 210◦C 230◦C 250◦C 270◦C 290◦C

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Gate Characteristic

VGS is limited by punch-through

◮ Depends on current

capability of the driver To block the JFET we need

◮ VGS < Vth

−50 50 100 150 200 250 300 Junction temperature [◦C] −34 −32 −30 −28 −26 −24 −22 −20 VGS [V]

VGS Threshold voltage (Vth)

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Gate Characteristic

VGS is limited by punch-through

◮ Depends on current

capability of the driver To block the JFET we need

◮ VGS < Vth

−50 50 100 150 200 250 300 Junction temperature [◦C] −34 −32 −30 −28 −26 −24 −22 −20 VGS [V]

VGS Threshold voltage (Vth) VGS punch-through voltage (Vpt) at 10 µA

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Gate Characteristic

VGS is limited by punch-through

◮ Depends on current

capability of the driver To block the JFET we need

◮ VGS < Vth

No damage observed on the JFET, even for IG > 10 mA

−50 50 100 150 200 250 300 Junction temperature [◦C] −34 −32 −30 −28 −26 −24 −22 −20 VGS [V]

VGS Threshold voltage (Vth) VGS punch-through voltage (Vpt) at 10 µA VGS punch-through voltage(Vpt) at 100 µA

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Gate Characteristic

VGS is limited by punch-through

◮ Depends on current

capability of the driver To block the JFET we need

◮ VGS < Vth

No damage observed on the JFET, even for IG > 10 mA

−50 50 100 150 200 250 300 Junction temperature [◦C] −34 −32 −30 −28 −26 −24 −22 −20 VGS [V]

VGS Threshold voltage (Vth) VGS punch-through voltage (Vpt) at 10 µA VGS punch-through voltage(Vpt) at 100 µA VGS punch-through voltage (Vpt) at 1 mA

A driver that can source 1 mA continuously ensures safe turning off up to very high temperature, with a wide VGS margin

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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IC Technology

Silicon on Insulator (SOI) is an established technology, which can be used for high temperature electronics:

Honeywell (“Extreme Design: Developing integrated circuits for -55 degC to +250° C”, nov 2008) 11 / 26

Design of the Gate Driver

◮ Driving requirements for SiCED JFETs:

◮ On: 0 V ◮ Off: ≈ -24 V with 1 mA quiescent and

≈ 1 A peak

◮ Commercial IGBT drivers can’t be used ◮ Chosen technology: Smartis-1

(ATMEL):

◮ 0.8 µm Bipolar-CMOS ◮ Partially-depleted SOI ◮ 3 AlSiCu metal layers ◮ Ti/AlSiCu/TiN interconnects 12 / 26

Driver IC

Dead-time Dead-time Level-shifter Buffer Buffer

G S GNDlocal Vneg Vaux1 In Vaux2

◮ Functions: input signal conditionning, dead time, push-pull output ◮ Other blocks (UVLO, short circuit protection. . . ) are not used here ◮ No external insulation provided for power supply and driving signal

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Example of Function Design for Wide Temp. Range

Dead-time generation

◮ Delay generation uses RC networks ◮ Delay can be adjusted by using 1..4 capacitors ◮ Use of a Negative Temperature Coefficient resistor to

• ppose the increase in resistance with temperature

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Example of Function Design for Wide Temp. Range

Dead-time generation

Dead-Time (ns)

100 150 200 250 300 350 400 450 500

Temperature (°C)

−50 50 100 150 200 250

Controls 1-3 ON Controls 1-2 ON Control 1 ON Controls OFF

◮ Delay generation uses RC networks ◮ Delay can be adjusted by using 1..4 capacitors ◮ Use of a Negative Temperature Coefficient resistor to

• ppose the increase in resistance with temperature

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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What’s Inside and What’s Not?

Dead-time Dead-time Level-shifter Buffer Buffer Dead-time Dead-time Level-shifter Buffer Buffer

Vbus OUT GND High-side gate driver Low-side gate driver

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What’s Inside and What’s Not?

Dead-time Dead-time Level-shifter Buffer Buffer Dead-time Dead-time Level-shifter Buffer Buffer

Vbus OUT GND High-side gate driver Low-side gate driver DC DC DC DC DC DC DC DC DC DC DC DC PWM generator

◮ Isolation functions (signal and power) ◮ PWM signal generation ◮ Large value decoupling capacitor (1 µF)

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Pictures of the power module

◮ CuMo leadframe / NiFe frame case ◮ ceramic substrate (AlN) ≈ 20 × 30 mm2 ◮ high temperature passives (Vishay, Presidio) ◮ Al wedge Wirebonds, except Au ball for driver ◮ Bonding: silver sintering

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The Test Setup

No encapsulation used ➜ VDC limited to 200 V Power module attached to a hotplate ➜ test from ambient to 315° C External components at room temp. ➜ signal and power isolation ➜ large DC capacitor Continuous operation on resistor

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

200°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

200°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

210°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

210°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

220°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

220°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

230°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

230°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

240°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

240°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

250°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

250°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

260°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

260°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

270°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

270°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

280°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

280°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

290°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

290°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

300°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

300°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Measurements

49.0 48.8 48.6 48.4 time [µs] 50 50 100 150 200 250 Vout [V] 0.2 0.0 0.2 time [µs]

310°C

49.0 48.8 48.6 48.4 time [µs] 1 1 2 3 4 5 Iout [A] 0.2 0.0 0.2 time [µs]

310°C

Vbus OUT GND JH JL

◮ VDC = 200 V (no

encapsulation)

◮ Rload = 50 Ω ◮ Fswitch = 10 kHz ◮ tdead−time = 1.2 µs

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Summary of the Results

◮ The module stopped working at 315°

C

◮ Operation resumed once the temperature was reduced

◮ “Clean” waveforms

◮ Fast turn-on (≈ 15 ns) ◮ Slow turn-off due to large dead-time and resistive load

◮ Test at limited power:

◮ 200 V (target 540 V bus) ◮ 4 A peak (target ≈ 10 A at 200°

C ambient)

◮ No sign of damage, change in color

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Summary of the Results

◮ The module stopped working at 315°

C

◮ Operation resumed once the temperature was reduced

◮ “Clean” waveforms

◮ Fast turn-on (≈ 15 ns) ◮ Slow turn-off due to large dead-time and resistive load

◮ Test at limited power:

◮ 200 V (target 540 V bus) ◮ 4 A peak (target ≈ 10 A at 200°

C ambient)

◮ No sign of damage, change in color

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Summary of the Results

◮ The module stopped working at 315°

C

◮ Operation resumed once the temperature was reduced

◮ “Clean” waveforms

◮ Fast turn-on (≈ 15 ns) ◮ Slow turn-off due to large dead-time and resistive load

◮ Test at limited power:

◮ 200 V (target 540 V bus) ◮ 4 A peak (target ≈ 10 A at 200°

C ambient)

◮ No sign of damage, change in color

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Summary of the Results

◮ The module stopped working at 315°

C

◮ Operation resumed once the temperature was reduced

◮ “Clean” waveforms

◮ Fast turn-on (≈ 15 ns) ◮ Slow turn-off due to large dead-time and resistive load

◮ Test at limited power:

◮ 200 V (target 540 V bus) ◮ 4 A peak (target ≈ 10 A at 200°

C ambient)

◮ No sign of damage, change in color

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Outline Introduction Selection of Power Devices Custom Gate Drive Prototype and Test Setup Results Conclusion

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Conclusion

◮ Inverter leg with integrated gate drive and passives

◮ Based on SiC JFETs ◮ Using custom-designed driver IC

◮ Short term operation demonstrated up to 310°

C

◮ Fast and “clean” waveforms due to proximity with

gate drive and decoupling capacitor

◮ Derating to 200 V

◮ Nearest temperature limits

◮ Capacitors (260°

C-rated capacitors available)

◮ Silicone Gel (250°

C-rated, but ages very quickly)

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Conclusion

◮ Inverter leg with integrated gate drive and passives

◮ Based on SiC JFETs ◮ Using custom-designed driver IC

◮ Short term operation demonstrated up to 310°

C

◮ Fast and “clean” waveforms due to proximity with

gate drive and decoupling capacitor

◮ Derating to 200 V

◮ Nearest temperature limits

◮ Capacitors (260°

C-rated capacitors available)

◮ Silicone Gel (250°

C-rated, but ages very quickly)

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Conclusion

◮ Inverter leg with integrated gate drive and passives

◮ Based on SiC JFETs ◮ Using custom-designed driver IC

◮ Short term operation demonstrated up to 310°

C

◮ Fast and “clean” waveforms due to proximity with

gate drive and decoupling capacitor

◮ Derating to 200 V

◮ Nearest temperature limits

◮ Capacitors (260°

C-rated capacitors available)

◮ Silicone Gel (250°

C-rated, but ages very quickly)

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What’s Next?

Choice of encapsulation scheme

◮ Hermetic sealing ◮ Silicone ◮ Parylene HT

Integration of signal & power isolation

◮ Development of high temperature transformers ◮ HT converters and signal conditionning

Actuator Integration

◮ Development of a complete 3-phase inverter ◮ Direct attachment to a high temperature motor

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Thank you for your attention,

cyril.buttay@insa-lyon.fr

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Credits

◮ picture of the Airbus A350: airbus ◮ picture of the thrust reverser: Hispano-Suiza

❤tt♣✿✴✴✇✇✇✳❤✐s♣❛♥♦✲s✉✐③❛✲s❛✳❝♦♠✴s♣✐♣✳♣❤♣❄r✉❜r✐q✉❡✹✽

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