Going with the Flow: Bridging the Gap between Theory and Practice - - PowerPoint PPT Presentation

Going with the Flow: Bridging the Gap between Theory and Practice in Physical Design

Patrick Groeneveld, Chief Technologist, Magma Design Automation ISPD 2010 San Francisco

March 15, 2010 – Patrick Groeneveld - ISPD 2010- 2

Overview: Physical Design Flows

• The Nature of the PD problem
• Objectives
• Algorithms
• How to build a flow
• ABC
• Tough problems:
• Crosstalk-induced delay
• Proof of efficacy

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Physical Design Flow: from logic to physical CDFG

Net list of Hyper Cells Placement

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Synthesis is from Mars, Analysis is from Venus

• Implementation

tools:

• RTL synthesis,

Placement, Routing, Optimization, Humans

• Poor accuracy
• Lean, mean
• Tough
• Is the ‘hacker’

Need to make this work

• Sign-off

tools:

• Verification,

Extraction, STA, spice, DRC, LVS

• Highly accurate
• Big and slow
• Parallelizable
• Is the ‘whiner’

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Making this work in a Physical Synthesis Flow

• Avoid loops:
• Gradual, Stepwise refinement
• ABC flows
• Speed up loops:
• Reducing analysis accuracy
• Tricks: incremental analysis
• Running tasks in parallel
• Tight tool integration

Gate rewiring Detailed placer Global router Track router Detailed router Gate resizing Gate buffering Global placer Mapping Detailed

• ptimization

Global-level timer Sign-off DRC checker Timer & Extractor Sign-off Timer Buffering Clock Tree S. Finesim- Spice Formal Verification

Iterate:

Congestion prediction

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Physical Design: Trade-offs between conflicting objectives

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The nature of the Physical Design ‘beast’

Pushing all objectives simultaneously costs:

• Human design effort,
• Run time

quality Runtime, design effort Speed, power, etc.

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Building a Physical Design Flow Observation 3:

Synthesis algorithms cannot deliver good multi-objective trade-offs

Gate rewiring Detailed placer Global router Track router Detailed router Gate resizing Gate buffering Global placer Mapping Detailed opt. Global-level timer Sign-off DRC checker Timer & Extractor Sign-off Timer Buffering Clock Tree S. Finesim- Spice Formal Verification

Observation 4:

Optimizing a single objective often makes other objectives worse.

Observation 1:

Need gradual refinement flow using many algorithms

Observation 2:

Synthesis algorithms need highly simplified models of reality

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The ABC of a Physical Design Flow

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Example ABC: Combating crosstalk delay

• Avoid: using ‘pessimism’:
• Size up all drivers: Costs cell area and power
• Force double spacing NDR on many nets: Costs congestion = area
• Build:
• Some routing tricks to spread & jog wires
• Correct using ECO:
• gate re-sizing, buffering
• Re-routing

Gate input cap:

4fF

Wire cap:

50fF, of which

30-80% is to neighbors

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Avoidance vs. Correction: masks

• Avoid:
• DRC deck with ‘hard’ rules
• Build:
• Dijkstra grid expansion + hacks
• Correct:
• Analyze using DRC, CAA, LPC
• Fix incrementally using R&R
• How many failures are

acceptable?

• < 100 violations: Manual fixes are feasible
• 1000-10000 violations: Automatic ECO-style

fixes, rip-up and reroute

• > 10,000 violations ???????

Routing Optimization Global routing Placement Logic Synthesis Floorplanning

GDS2

CAA LPC CMP

Physical Synthesis System

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Controlling the amount of correction

• Relax the objective
• More Avoidance (pessimism)
• Which might deteriorate other objectives

fail pass Probability Distribution Function

Run flow

designer

Objectives

Physical Design Flow

Needs Correction

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Local Optima in a Physical Design Flow

Routing Optimization Global routing Placement Logic Synthesis Floorplanning Solution Cost

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The Physical Design Flow as a Pachinko Machine

• Run flow:
• End up an one of the local optima.
• Re-run:
• typically get same results
• (Multi-processing alert!!)
• Re-run with small change
• Could be significant difference
• Changes:
• Irrelevant order changes
• Additional steps/algorithms
• Changing constraints, tuning, etc.
• Good/bad results depend on:
• ‘ease’ of the design
• Flow set-up/tuning
• Design structure (e.g. data paths)
• Coincidence

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How to tune the flow?

• Tuning of the TCL script
• First time:
• Poor local optimum, bugs,

mistakes

• Tune flow+data
• Better local optimum.
• But:
• Loop is slow
• Tool talks gibberish
• Result depend on experience
• f engineer.
• Hacks are design-specific

Run tool flow Analyze results

run.tcl

Design data

Timing report

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PD Flow tuning for best out-of-the-box results

• Goal:
• Improving the chance of ending up in a good local
• ptimum. (that is: move the mean for better QOR)
• That requires:
• Good understanding of cause, actions, side-effects
• Statistical evidence of efficacy
• Issue:
• Effects and side-effects are hard to predict
• How to distinguish design-specific noise from real

improvements?

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Medical tools vs. Physical design tools

• New drug
• Biological model of cause,

actions and side-effects

• Develop it
• Test tube test
• Test on animals
• Efficacy,
• side effects
• Clinical trials
• Large double-blind placebo
• controlled tests
• FDA-approval
• New flow component
• Based on electrical/

physical plausability

• Program it (C++/TCL)
• Unit test
• Test on small testcases
• Debug program
• Efficacy, side effects
• Beta test
• Hope that customers use it
• Deployment
• Go for it!

“Engineers: think it, build it, demo it, declare victory”

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Lack of evidence = quackery

Physical Design is not exempt`:

• Structured

placement

• Thermal-driven

placement

• Plug ‘n play tool

interoperability

• Running PD tools

in parallel on a GPU.

• Gridless routing
• X-Architecture

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Apply skeptical wisdom

• “Humans are amazingly good at self-deception”
• This looks soooo good, therefore this must work
• “If it has no side effects, it probably has no effects

either”

• Example: improving temperature gradients will cost timing you!

Are you really willing to pay based on the evidence?

• “Do not confuse association with causation”
• “I took this airborne pill, and I did not get sick”
• “I used this DFM optimizer, and the chip yields!
• “The plural of ‘anecdote’ is ‘anecdotes’, not data”
• Result could be a random effect, or another side effect
• No substitute for unbiased placebo-controlled tests
• Only large data sets are statistically relevant

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Coarse-grain partitioning to speed up

place Partition/budget Assemble Build each block in parallel

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Summary: it’s the flow, not the algorithm!

• Need to deal with conflicting objectives
• Careful tuning of:
• Clever Avoidance (as little as surgical as needed)
• Incremental Correction.
• Need to focus on the dominant issues:
• Timing: very poor delay predictability
• Design scale: keeping up with Moore’s law
• Be skeptical and honest!
• Negative results are as important and positive!