Formal and Incremental Verification of SysML Specifications for the Design of Component-Based Systems Oscar Carrillo Département d’Informatique des Systèmes Complexes (DISC), Femto-ST UMR 6174 CNRS Encadrement : Hassan Mountassir et Samir Chouali Soutenue le 17 decembre 2015 à Besançon Oscar Carrillo Formal and Incremental Verification... 1 / 54
Outline Introduction 1 Scientific Context 2 Contributions 3 Conclusion and Perspectives 4 Oscar Carrillo Formal and Incremental Verification... 1 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives Outline Introduction 1 Scientific Context 2 Contributions 3 Conclusion and Perspectives 4 Oscar Carrillo Formal and Incremental Verification... 1 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Context Context Development of Systems by Component Assembly ◮ Reduce complexity ◮ Reduce development costs ◮ Improve reliability Functional Requirements Functional properties that the system must satisfy to fulfill user needs SysML Complex systems, communicate, popular Oscar Carrillo Formal and Incremental Verification... 2 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Context Context Component-Based Systems (CBS) ◮ Components described by their interfaces ◮ Simple and composite components ◮ Built by assembling the components ◮ Architecture described by the connections between the components ◮ Leads to big systems (complex) A B AB Oscar Carrillo Formal and Incremental Verification... 3 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Challenge Challenge In SysML a component is defined by a block How to formally ensure reliability of CBS described by SysML ? Oscar Carrillo Formal and Incremental Verification... 4 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Contributions Contributions Oscar Carrillo Formal and Incremental Verification... 5 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Case Study A Car Safety System Airbag and seat-belts protecting passenger lives Oscar Carrillo Formal and Incremental Verification... 6 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives Outline Introduction 1 Scientific Context 2 The SysML Language Interface automata Contributions 3 Conclusion and Perspectives 4 Oscar Carrillo Formal and Incremental Verification... 6 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . SysML The SysML Language Systems Modeling Language ◮ Model hardware and software systems ◮ Functional and non-functional requirements ◮ Interdisciplinary ◮ SysML is a communication method, not a methodology SysML Structural Diagrams Behavioral Diagrams Cross-Cutting Diagrams Block Definition Diagram Use Case Diagram Requirement Diagram Internal Block Diagram Sequence Diagram Parametric Diagram Activity Diagram UML 2.0 SysML 1.3 Package Diagram State Machine Diagram Oscar Carrillo Formal and Incremental Verification... 7 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Interface automata Interface Automata [Alfaro, Henzinger 2001] Definition An interface automaton A is represented by the tuple � S , I , Σ I , Σ O , Σ H , δ � such as : ◮ S is a finite set of states , ◮ I ⊆ S is a finite set of initial states , ◮ Σ I , Σ O and Σ H , respectively denote the sets of input, output and internal actions. Σ A = Σ I ∪ Σ O ∪ Σ H , ◮ δ ⊆ S × Σ × S is the set of transitions between two states . Oscar Carrillo Formal and Incremental Verification... 8 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Interface automata Interface automata synchronized product Definition Let A 1 and A 2 two composable interface automata. The synchro- nized product A 1 ⊗ A 2 of A 1 and A 2 is defined by : ◮ S A 1 ⊗ A 2 = S A 1 × S A 2 and I A 1 ⊗ A 2 = I A 1 × I A 2 ; ◮ Σ I A 1 ⊗ A 2 = (Σ I A 1 ∪ Σ I A 2 ) \ Shared ( A 1 , A 2 ); ◮ Σ O A 1 ⊗ A 2 = (Σ O A 1 ∪ Σ O A 2 ) \ Shared ( A 1 , A 2 ); ◮ Σ H A 1 ⊗ A 2 = Σ H A 1 ∪ Σ H A 2 ∪ Shared ( A 1 , A 2 ); ◮ (( s 1 , s 2 ) , a, ( s ′ 1 , s ′ 2 )) ∈ δ A 1 ⊗ A 2 if ◮ a �∈ Shared ( A 1 , A 2 ) ∧ ( s 1 , a, s ′ 1 ) ∈ δ A 1 ∧ s 2 = s ′ 2 ◮ a �∈ Shared ( A 1 , A 2 ) ∧ ( s 2 , a, s ′ 2 ) ∈ δ A 2 ∧ s 1 = s ′ 1 ◮ a ∈ Shared ( A 1 , A 2 ) ∧ ( s 1 , a, s ′ 1 ) ∈ δ A 1 ∧ ( s 2 , a, s ′ 2 ) ∈ δ A 2 . Oscar Carrillo Formal and Incremental Verification... 9 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Interface automata Interface automata synchronized product Oscar Carrillo Formal and Incremental Verification... 10 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Interface automata Illegal states Definition Let two composable interface automata A 1 and A 2 , the set of illegal states Illegal ( A 1 , A 2 ) ⊆ S A 1 × S A 2 is defined by { ( s 1 , s 2 ) ∈ S A 1 × S A 2 | ∃ a ∈ Shared ( A 1 , A 2 ) . C } where C is : C = ( a ∈ Σ O A 1 ( s 1 ) ∧ a �∈ Σ I A 2 ( s 2 )) ∨ ( a ∈ Σ O A 2 ( s 2 ) ∧ a �∈ Σ I A 1 ( s 1 )) Oscar Carrillo Formal and Incremental Verification... 11 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . Interface automata Composition Definition The composition A 1 � A 2 of two IA A 1 and A 2 is defined by : (i) S A 1 � A 2 = Comp ( A 1 , A 2 ) , (ii) I A 1 � A 2 = I A 1 ⊗ A 2 ∩ Comp ( A 1 , A 2 ) (iii) δ A 1 � A 2 = δ A 1 ⊗ A 2 ∩ Comp ( A 1 , A 2 ) × Σ A 1 � A 2 × Comp ( A 1 , A 2 ) Where Comp ( A 1 , A 2 ) = A 1 ⊗ A 2 − Illegal ( A 1 , A 2 ) Compatibility Two interface automata A 1 and A 2 are compatibles if and only if their composition A 1 � A 2 has at least one reachable state. Oscar Carrillo Formal and Incremental Verification... 12 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement Outline Introduction 1 Scientific Context 2 Contributions 3 Incremental Refinement of a CBS Architecture Formal Verification of SysML Requirements Incremental Specification of CBS Architecture Conclusion and Perspectives 4 Oscar Carrillo Formal and Incremental Verification... 12 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement Incremental Refinement of a CBS Architecture Oscar Carrillo Formal and Incremental Verification... 13 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement Overview Refinement by decomposition Structural and behavioral refinement relation. Oscar Carrillo Formal and Incremental Verification... 14 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement Refinement Process Oscar Carrillo Formal and Incremental Verification... 15 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement CBS Specification with SysML 1.3 Block Definition Diagram (BDD) Structure of abstract system Oscar Carrillo Formal and Incremental Verification... 16 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement CBS Specification with SysML 1.3 Block Definition Diagram (BDD) Description of SensorsControl block Oscar Carrillo Formal and Incremental Verification... 17 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement CBS Specification with SysML 1.3 Block Definition Diagram (BDD) Proposed decomposition for abstract block. Oscar Carrillo Formal and Incremental Verification... 18 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement CBS Specification with SysML 1.3 Internal Block Diagram (IBD) Proposed internal structure for abstract block Oscar Carrillo Formal and Incremental Verification... 19 / 54
Introduction Scientific Context Contributions Conclusion and Perspectives � . . . CBS Architecture Refinement Formal SysML Specification Definition : SysML Block Let SB a set of blocks modeled with a BDD , a SysML block B in SB is a tuple � Φ B , P in , P out , TypePort � , where : ◮ Φ B is the set of the private operations in B , ◮ P in the unique input port of B , ◮ P out the unique output port of B . ◮ TypePort : P in ∪ P out → SB determines the interface that types each port. Oscar Carrillo Formal and Incremental Verification... 20 / 54
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