Feedback + feed-forward plans Philip Burrows John Adams Institute - - PowerPoint PPT Presentation

Feedback + feed-forward plans

Philip Burrows

John Adams Institute Oxford University

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 1

Outline

• The UK team
• Main-beam IP feedback
• Drive-beam phase stability feed-forward
• Summary

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 2

Feedback On Nanosecond Timescales

Beam-based FB/FF R&D for future Linear Colliders

Philip Burrows Glenn Christian Javier Resta Lopez Colin Perry Graduate students: Ben Constance Robert Apsimon Douglas Bett Alexander Gerbershagen Michael Davis Neven Blaskovic

Valencia, CERN, DESY, KEK, SLAC

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 3

IP intra-train feedback system - concept

Last line of defence against relative beam misalignment Measure vertical position of outgoing beam and hence beam-beam kick angle Use fast amplifier and kicker to correct vertical position of beam incoming to IR

FONT – Feedback On Nanosecond Timescales

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 4

Philip Burrows ALCPG11, Eugene 21/03/11 5

CLIC IP FB system

• Prototype IP FB hardware has been developed since 2000

FONT2 results – NLCTA (2001)

Feedback on Beam flattener on Beam starting positions Delay loop on

beam start beam end

1 2 3 4

Philip Burrows ALCPG11, Eugene 21/03/11 7

CLIC IP FB system

• Prototype IP FB hardware has been developed since 2000
• CLIC IP FB luminosity simulations (EuroTeV, EUCARD)
• For past 18 months have been working with MDI team

(Lau Gatignon et al) on realisation of an IP intra-train FB system engineered for CLIC

• Approved as baseline at CTC - February 2010
• Interactions on mechanical integration with Alain Herve

et al February – June 2010

• Agreed on baseline conceptual engineering design

– July 2010

• Documented in draft sections for CDR – October 2010
• Ready to provide any modifications to CDR text

Philip Burrows ALCPG11, Eugene 21/03/11 8

CLIC Final Doublet region

Elsner

Philip Burrows ALCPG11, Eugene 21/03/11 9

Technical issues for TDR phase

• Engineering of real hardware optimised for tight spatial

environment: BPM, kicker, cables …

• Large (and spatially-varying) B-field  operation of

ferrite components in kicker amplifier?!

• Further studies of radiation environment for FB system:

was studied for ILC, so far preliminary for CLIC; where to put electronics? need to be rad hard? shielded?

• EM interference:

beam  FB electronics kicker  detector

Philip Burrows ALCPG11, Eugene 21/03/11 10

Draft work programme

• Simulation, design and prototyping of IP feedback

system for luminosity stabilisation and optimisation

• Integration of components within Machine Detector

Interface (MDI) design

• Completion of the ATF2 prototype systems as part of the

ATF2 collaboration goals of 37nm beam size and nanometer-level beam stabilisation

• Bench testing of relevant component prototypes, and

exploration of the possibility of beam tests at CTF3

• Provision of feedback system parameters for modeling

the integrated performance of feedback and feed-forward systems in the global CLIC design

FONT5 location

FONT5 layout

QD10X QF11X QD12X QD14X QF13X QF15X K1 K2 P2 P3 P1 To dump FB board DAQ

P2  K1 (‘position’) P3  K2 (‘angle’) P3  K1

FONT5 beamline hardware

3 new BPMs and 2 new kickers installed in new ATF2 extraction line February 2009; BPM movers installed 2010

14

Kicker BPM Digital feedback Analogue BPM processor Drive amplifier

e-

Each FONT5 system loop

300ns train of bunches separated by 150ns

Kicker BPM 1 Analogue BPM processor BPM 2 BPM 3

e-

FONT3 ‘CLIC’ prototype at KEK/ATF

(2004-5)

56ns train of bunches separated by 2.8ns FB loop closed with electronics latency 13ns

P2  K1 loop jitter reduction

Bunch 1 Bunch 2 Bunch 3 13 um  5 um  3 um

P2  K1 loop jitter reduction

Bunch 1 Bunch 2 2.1 um  0.4 um Factor of 5 jitter reduction

18

CLIC drive beam phase FF system

• For past 20 months have been working with

Daniel Schulte, Frank Stulle et al on concept for a drive-beam phase stability FF system

• Meetings to map out requirements for amplifier

system needed to provide phase correction – August 2009 – August 2010

• Preliminary design presented – October 2010
• Documented in draft sections for CDR –

November 2010

• Ready to provide any modifications to CDR text

Reminder of phase feed-forward concept

Requirements & Assumptions - 1

Based on discussion in August 2009, we assumed: Speed: 10ns

• we shared the bandwidth limitation equally between kicker and amplifier
• kicker active length is limited to 1.1m
• split amplifier bandwidth equally between amplifier modules and

combining system

• each needs a 70MHz bandwidth

Kickers: stripline kickers, 20mm clear aperture, 1m long

• ~120 ohm impedance, balanced
• each connected to amplifier with pair of coaxial cables
• fit maximum possible total length of kickers for minimum total power

required

• this means 4 at each bend (3, slightly longer, might be better)

Requirements & Assumptions - 2

Deflection: +/-720μrad at each bend

• divided over 4 kickers = +/-180μrad at each

Amplifier architecture: modular, MOSFET

• standard solution for fast, high-power amplifiers
• output from many low power modules have to be combined
• output voltage has to be stepped-up to provide the kV

needed by the kicker

• the very low duty factor required (0.002%) is very unusual
• it allows extremely high power densities and (relatively) low

cost

• note: MOSFETs have almost entirely superceded bipolar

transistors in this role

A Preliminary System Concept 1

• 4 kickers at each bend
• 250kW peak power amplifier to each kicker
• 256 amplifier modules in each amplifier
• 1.2kW output each amplifier module (1kW after

losses in combining etc)

dipole magnet 1m kicker 250kW amp

8m 5m 8m

NOT TO SCALE

A Preliminary System Concept 2

• amplifier size: 60 x 60 x 30cm (=100 litres) min (double that

is more comfortable)

• amplifier cost: £75K per 250kW amplifier (£300 per kW

delivered to kicker) *** This is all very very approximate ***

• it makes no allowance for technological progress
• no single dominant cost, so estimates very rough until

details worked out

• very dependent on high-volume costs: we have no sound

basis for these

• 16 amplifiers & kickers / drive beam, 768 amplifiers total,

200MW total peak power

• SYSTEM COST: £60M (perhaps +/-£30M)

Modified Design (Feb 2010)

• required kick angle at each bend was reduced to +/-375 μrad
• this would have reduced power per kicker to 66kW peak
• much more reasonable than the previous 250kW
• but energy spread of beam & dispersion of chicane increased kicker

aperture

• 0.5% rms energy spread, 1m dispersion
• adds 5mm rms spread to beam width in middle section
• to accept up to 4σ in energy, extra 40mm aperture needed
• allowing for beam deflection and a finite beam size, need 50mm

aperture

• brings power back up to 410kW peak
• allowing any sort of margin brings this to 600kW
• eg for a slightly higher energy spread than assumed

Later it was indicated that full kick would not be essential at full bandwidth - this may prove a useful dispensation

Amplifier Modules

Module power is a matter of cost and size

• sweet spot looks today to be 1 to 2kW

peak for 100MHz module bandwidth

• we are forced to low voltage, low

impedance operation, and transforming the output  2kW peak output 10ns amplifier module  typical fast, high voltage MOSFETs (DE150-501N)

Engineering validation for CLIC

amplifier output stage:

• can we actually get the predicted performance?

combining system:

• can we do this reliably?
• can we do it at the final power levels needed?
• can we get adequate frequency response?

transformers and associated ferrites:

• will they work well enough?
• what are the detailed properties of the ferrites?
• how big and how expensive will they end up?

size and cost:

• push an amplifier module to a more-or-less finished design
• that would set an upper bound on size and cost
• amplifier module will dominate system cost

system concepts:

• functional test of a small-scale system would be an appropriate next stage
• eg: 16 amplifier modules and one combining stage, driving a kicker

27

Timescale

This is a serious project for 1 FTE fully-dedicated engineer! Basic feasibility study  conceptual design 2-3 years Build + test prototype unit 1-2 years

28

Prototype tests at CTF3?

Amplifier power multiplier

• Beam energy: 120-150 MeV (10X less)

1/100

• Kick angle ~ 1 mrad (3X more)

10

• Kicker gap: 40mm (similar)

1

• Kicker length: 375mm (3X less)

3

• 2 kickers (2X less)

2  similar power per amplifier as CLIC (?) Similar bandwidth, latency and pulse duration (?)

29

Discussion

• Piotr Skowronski suggested a 4kV pulse is

required to provide a 1mrad deflection via the kicker being designed by Fabio Marcellini

• This looks like a 320kW amplifier (consistent

with the previous estimate)

• Equivalent to 1 of 768 amplifiers needed for CLIC
• Can CTF3 requirements be relaxed?
• eg. 0.3mrad  10X less power, i.e. 30kW
• Commercial amplifiers:

Amplifier Research: 25kW = $800k (!)

Extra material follows

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 30

CLIC-relevant: all-analogue systems

• NLCTA (SLAC): 65 MeV beam, 170ns train, 87ps bunch spacing

FONT1 (2001-2): First demonstration of closed-loop FB: latency 67ns 10/1 beam position correction FONT2 (2003-4): Improved demonstration of FB: latency 54ns real time charge normalisation with logarithmic amplifiers beam flattener to straighten train profile solid-state amplifier

• ATF (KEK): 1.3 GeV beam, 56ns train, 2.8ns bunch spacing

FONT3 (2004-5): Ultra-fast demonstration of FB: latency 23 ns 3 stripline BPMs high-power solid-state amplifier

Brief prototype history: CLIC

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 31

Kicker BPM 1 Analogu e feedback Analogue BPM processor Drive amplifier BPM 2 BPM 3

e-

Generic prototype layout: CLIC

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 32

FONT2 beamline installation at SLAC NLCTA

(65 MeV 170ns-long train @ 87ns spacing)

Dipole and kickers BPMs

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 33

FONT: kicker driver amplifiers

FONT1 3-stage tube amplifier FONT3 PCB amplifer + FB Same drive power as needed for CLIC

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 34

FONT2 results

Feedback on Beam flattener on Beam starting positions Delay loop on

beam start beam end

1 2 3 4

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 35

FONT3: latency budget

• Time of flight kicker – BPM:

4ns

• Signal return time BPM – kicker: 6ns

Irreducible latency: 10ns

• BPM processor: 5ns
• Amplifier + FB: 5ns

Electronics latency: 10ns

• Total latency budget: 20ns

Allows 56/20 = 2.8 periods during bunchtrain

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 36

FONT3: BPM processor + amplifier/feedback installation in ATF beamline

BPM processor board Amplifier/FB board FEATHER kicker

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 37

FONT3: Beamline Installation

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 38

Fast analogue signal processors

2005 2007 2006

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 39

FONT3: Results (June 3 2005):

Delay-loop feedback w. latency 23 ns

56ns bunchtrain FB on FB + delay loop on 23ns 200um

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 40

CLIC prototype: Summary

67 ns 54 ns 23 ns

Basic principle demonstrated. More work needed to optimise Design + system performance.

Philip Burrows UK-CLIC kickoff meeting, CERN 13/4/11 41