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EECS 373 Website up Design of Microprocessor-Based Systems - PDF document

Announcements EECS 373 Website up Design of Microprocessor-Based Systems http://www.eecs.umich.edu/~prabal/teaching/eecs373/ Homework 1 posted (mostly a 270 review) Lab and office hours posted on-line. Prabal Dutta My office


  1. Announcements EECS 373 • Website up Design of Microprocessor-Based Systems – http://www.eecs.umich.edu/~prabal/teaching/eecs373/ • Homework 1 posted (mostly a 270 review) • Lab and office hours posted on-line. Prabal Dutta – My office hours: Tuesdays 1:30-3:00 pm in 4773 BBB University of Michigan • Projects – Start thinking about them now! Lecture 2: Architecture, Assembly, and ABI September 4, 2014 Slides developed in part by Mark Brehob 1 2 Today… Major elements of an Instruction Set Architecture (registers, memory, word size, endianess, conditions, instructions, addressing modes) 32-bits 32-bits ! Finish ARM assembly example from last time !mov!r0,!#4! ! Walk though of the ARM ISA !ldr!r1,![r0,#8] ! ! !!!!!!r1=mem((r0)+8)! Software Development Tool Flow ! !bne!loop! ! Application Binary Interface (ABI) !subs!r2,!#1! Endianess Endianess 3 4 The endianess religious war: 288 years and counting! Addressing: Big Endian vs Little Endian (370 slide) • Modern version • Little-Endian • Endian-ness: ordering of bytes within a word – Little - increasing numeric significance with increasing – Danny Cohen – LSB is at lower address memory addresses – IEEE Computer, v14, #10 !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Memory!!!!!Value! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Offset!!(LSB)!(MSB)! – Big – The opposite, most significant byte first !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!======!!===========! – Published in 1981 uint8_t!a!!=!1;!!!!!!!!!!!!!!!0x0000!!01!02!FF!00! – MIPS is big endian, x86 is little endian uint8_t!b!!=!2;! – Satire on CS religious war uint16_t!c!=!255;!//!0x00FF! uint32_t!d!=!0x12345678;!!!!!!0x0004!!78!56!34!12! • Big-Endian • Historical Inspiration – MSB is at lower address – Jonathan Swift !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Memory!!!!!Value! – Gulliver's Travels !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!Offset!!(LSB)!(MSB)! !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!======!!===========! – Published in 1726 uint8_t!a!!=!1;!!!!!!!!!!!!!!!0x0000!!01!02!00!FF! uint8_t!b!!=!2;! – Satire on Henry-VIII � s split uint16_t!c!=!255;!//!0x00FF! uint32_t!d!=!0x12345678;!!!!!!0x0004!!12!34!56!78! with the Church • Now a major motion picture! 5

  2. Instruction encoding Assembly example • Instructions are encoded in machine language opcodes data: • Sometimes .byte 0x12, 20, 0x20, -1 – Necessary to hand generate opcodes – Necessary to verify assembled code is correct func: • How? Refer to the “ARM ARM” mov r0, #0 mov r4, #0 Register!Value!!!!!!Memory!Value! Instructions ! movw r1, #:lower16:data 001|00|000|00001010!(LSB)!(MSB)! movs!r0,!#10 ! movt r1, #:upper16:data (msb)!!!!!!!!!(lsb)!0a!20!00!21! ! top: ldrb r2, [r1],#1 movs!r1,!#0! 001|00|001|00000000! add r4, r4, r2 ARMv7 ARM add r0, r0, #1 cmp r0, #4 bne top 8 Instructions used From the ARMv7-M Architecture Reference Manual (posted on the website under references) • mov – Moves data from register or immediate. – Or also from shifted register or immediate! • the mov assembly instruction maps to a bunch of different encodings! – If immediate it might be a 16-bit or 32-bit instruction • Not all values possible • why? • movw There are similar entries for – Actually an alias to mov move immediate, move shifted • “w” is “wide” (which actually maps to different instructions) etc. • hints at 16-bit immediate 9 10 Directives • #:lower16:data – What does that do? – Why? 11 12

  3. Loads! Addressing Modes • Offset Addressing • ldrb -- Load register byte – Offset is added or subtracted from base register – Result used as effective address for memory access – Note this takes an 8-bit value and moves it into a 32-bit – [<Rn>, <offset>] location! • Zeros out the top 24 bits • Pre-indexed Addressing – Offset is applied to base register – Result used as effective address for memory access – Result written back into base register • ldrsb -- Load register signed byte – [<Rn>, <offset>]! – Note this also takes an 8-bit value and moves it into a • Post-indexed Addressing 32-bit location! – The address from the base register is used as the EA • Uses sign extension for the top 24 bits – The offset is applied to the base and then written back – [<Rn>], <offset> 13 So what does the program _do_? Today… data: .byte 0x12, 20, 0x20, -1 Finish ARM assembly example from last time func: mov r0, #0 Walk though of the ARM ISA mov r4, #0 movw r1, #:lower16:data movt r1, #:upper16:data Software Development Tool Flow top: ldrb r2, [r1],#1 Application Binary Interface (ABI) add r4, r4, r2 add r0, r0, #1 cmp r0, #4 bne top 15 16 An ISA defines the hardware/software interface ARM Architecture roadmap • A “contract” between architects and programmers • Register set • Instruction set – Addressing modes – Word size – Data formats – Operating modes – Condition codes • Calling conventions +M4 : DSP ISA – Really not part of the ISA (usually) – Rather part of the ABI – But the ISA often provides meaningful support. 17 18

  4. A quick comment on the ISA: ARM Cortex-M3 ISA From: ARMv7-M Architecture Reference Manual Instruction Set Register Set Address Space Branching Data processing Load/Store Exceptions Miscellaneous 32-bits 32-bits Endianess Endianess 19 20 Registers Address Space Note: there are two stack pointers! SP_main (MSP) used SP_process (PSP) used by: by: - OS kernel - Base app code (when not running - Exception handlers an exception - App code w/ handler) privileded access Mode dependent 21 22 Instruction Encoding ADD immediate 23 24

  5. Branch Data processing instructions Many, Many More! 25 26 Load/Store instructions Miscellaneous instructions 27 28 Addressing Modes (again) <offset> options • Offset Addressing • An immediate constant – Offset is added or subtracted from base register – #10 – Result used as effective address for memory access – [<Rn>, <offset>] • An index register • Pre-indexed Addressing – <Rm> – Offset is applied to base register – Result used as effective address for memory access • A shifted index register – Result written back into base register – <Rm>, LSL #<shift> – [<Rn>, <offset>]! • Post-indexed Addressing • Lots of weird options… – The address from the base register is used as the EA – The offset is applied to the base and then written back – [<Rn>], <offset>

  6. Application Program Status Register (APSR) ARMv7-M Architecture Reference Manual ARMv7-M_ARM.pdf 31 Updating the APSR Overflow and carry in APSR • SUB Rx, Ry – Rx = Rx - Ry unsigned_sum = UInt(x) + UInt(y) + UInt(carry_in); – APSR unchanged • SUBS signed_sum = SInt(x) + SInt(y) + UInt(carry_in); – Rx = Rx - Ry – APSR N, Z, C, V updated result = unsigned_sum<N-1:0>; // == signed_sum<N-1:0> • ADD Rx, Ry – Rx = Rx + Ry carry_out = if UInt(result) == unsigned_sum then ’0’ else ’1’; – APSR unchanged • ADDS – Rx = Rx + Ry overflow = if SInt(result) == signed_sum then ’0’ else ’1’; – APSR N, Z, C, V updated 34 Conditional execution: The ARM architecture “books” for this class Append to many instructions for conditional execution 36

  7. The ARM software tools “books” for this class Exercise: What is the value of r2 at done? ...! start:! !movs!r0,!#1! !movs!r1,!#1! !movs!r2,!#1! !sub!!r0,!r1! !bne!!done! !movs!r2,!#2! done:! !b!!!!done! ...! 37 38 Solution: Today… what is the value of r2 at done? ...! start:! Finish ARM assembly example from last time !//!r0! ! !1,!Z=0! !movs!r0,!#1 !//!r1! ! !1,!Z=0! !movs!r1,!#1 Walk though of the ARM ISA !//!r2! ! !1,!Z=0! !movs!r2,!#1 !//!r0! ! !r0Wr1! !sub!!r0,!r1 ! ! ! !//!but!Z!flag!untouched ! Software Development Tool Flow ! ! ! !//!since!sub!vs!subs! !bne!!done ! !//!NE!true!when!Z==0! Application Binary Interface (ABI) ! ! ! !//!So,!take!the!branch! !movs!r2,!#2 !//!not!executed! done:! !b!!!!done ! !//!r2!is!still!1! ...! 39 40 How does an assembly language program What are the real GNU executable names for the ARM? get turned into a executable program image? Binary!program ! • Just add the prefix “arm-none-eabi-” prefix file!(.bin) ! • Assembler (as) – arm-none-eabi-as Assembly ! Object ! • Linker (ld) Executable ! files!(.s) ! files!(.o) ! image!file ! – arm-none-eabi-ld • Object copy (objcopy) ld ! (linker) ! – arm-none-eabi-objcopy as ! (assembler) ! • Object dump (objdump) – arm-none-eabi-objdump ! • C Compiler (gcc) Memory ! layout ! – arm-none-eabi-gcc Disassembled ! • C++ Compiler (g++) Linker ! code!(.lst) ! script!(.ld) ! – arm-none-eabi-g++ 41 42

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