9.1 CS356 Unit 9 Virtual Memory & Address Translation
9.2 Indirection • Indirection means using one entity to refer to another • Examples: – A variable name vs. it's physical memory address – Phone number vs. cell tower location/phone ID – Titles like "CEO" or "head coach" are virtual titles that can be applied to different people at different times • The benefits are we can change one without changing the other – We can change the underlying implementation without changing the higher level task. For example, a job description would read "The CEO shall perform this duty or that." and it need not be changed if the company replaces John Doe with Jane Doe. • "All problems in computer science can be solved by another level of indirection" – attributed to David Wheeler
9.3 Virtual Memory & Address Translation • We are going to indirect the addresses used by computer programs • Primary Idea = Compile the program with fictitious (virtual) addresses and have a translator convert these to physical addresses as the program runs (this is Address Translation) – Efficiently share the physical memory between several running programs/processes and provide protection from accessing each others' information • Secondary Idea = Use main memory (MM) as a "cache" for multiple programs' data as they run, using secondary storage (hard-drive) as the home location (this is Virtual Memory) – Remove the need of the programmer to know how much memory is physically present and/or give the illusion of more or less physical memory than is present • These ideas are often used interchangeably
9.4 Benefits of Address Translation • What is enabled through virtual memory and address translation? – Illusion of more or less memory than physically present – Isolation – *Controlled sharing of code or data – *Efficient I/O (memory-mapped files) – *Dynamic allocation (Heap / Stack growth) – *Process migration • *Will be discussed in a subsequent unit or Operating Systems class
9.5 Memory Hierarchy & Caching • Lower levels act as a cache for upper levels Registers L1 Cache ~ 1ns L1/L2 is a “cache” for L2 Cache main memory ~ 10ns Main Memory Virtual memory ~ 100 ns provides each Disk / Secondary Storage process its own ~1-10 ms address space in secondary storage and uses main memory as a cache This Photo by Unknown Author is licensed under CC BY-SA
9.6 Secondary Storage: Magnetic Disks • Magnetic hard drive consists of – Double sided surfaces/platters (with R/W head) – Each platter is divided into concentric tracks of small sectors that each store several thousand bits • Performance is slow primarily due to moving mechanical parts Read/Write Head 0 • Seek Time: Time needed to 3-12 ms Read/Write Head 1 position the read-head above Surfaces … the proper track • Rotational delay: Time needed 5-6 ms Read/Write Head 7 to bring the right sector under Sector 0 the read-head • Depends on rotation Track 0 Sector 1 speed (e.g. 5400 RPM) Track 1 • Transfer Time: 0.1 ms • Disk Controller Overhead: + 2.0 ms ~20 ms Sector 2
9.7 Secondary Storage: Flash • Flash (solid-state) drives store bits using special transistors that retain their values even when power is turned off • Performance is higher than magnetic disks but still slower comparted to main memory – Better sequential read throughput • HD (Magnetic): 122-204 MB/s • SSD: 210-270 MB/s – MUCH better random read OS:PP 2 nd Ed. Fig. 12.6 • Max latency for single read/write: 75us Intel 710 SSD specs. • When many requests present we can overlap and achieve latency of around 26us (1/38500) • Flash drives "wear-out" after some number of writes/erasures
9.8 Address Spaces • Physical address spaces corresponds to the actual system address range Program/Process 1,2,3,… (based on the width of the address bus) of the processor and how much 0xffff ffff 0xffff ffff - Not main memory is physically present Mapped used I/O • Each process/program runs in its own - 0xbfffffff private "virtual" address space 0xc0000000 I/O Stack – Virtual address space can be larger 0x80000000 - (or smaller) than physical memory Heap Not – Virtual address spaces are protected used - from each other Data 0x10000000 0x3fffffff - Mem. Code 0x00000000 0x00000000 32-bit Physical 32-bit Fictitious Virtual Address Space w/ Address Spaces only 1 GB of Mem ( > 1GB Mem)
9.9 Processes Program/Process • Process 1,2,3,… – (def 1.) Address Space + Threads 0xffff ffff - • (Virtual) Address Space = Protected view of memory Mapped • 1 or more threads I/O – (def 2.) : Running instance of a program that has - limited rights 0xc0000000 Stack • Memory is protected: Address translation (VM) ensures no - access to any other processes' memory Heap • I/O is protected: Processes execute in user-mode (not kernel mode) which generally means direct I/O access is - disallowed instead requiring system calls into the kernel Data 0x10000000 • - OS Kernel is not considered a "process" = Thread – Has access to all resources and much of its code is Code 0x00000000 invoked under the execution of a user process thread Address Spaces
9.10 Virtual Address Spaces (VAS) • Virtual address spaces 0 - Code Program/Process 1 - Code 1,2,3,… (VASs) are broken into 0 - Code 2 - Data 1 - Code blocks called "pages" 3 - Stack 0xffff ffff - 2 - Data 4 - Heap Mapped 3 - Stack • Depending on the … I/O 4 - Heap - program, much of the 0 0 0xc0000000 Stack 1 1 virtual address space will 2 - 2 3 be unused 3 Heap 0 Unalloc • Pages can be allocated - 1 … Data 2 0x10000000 "on demand" (i.e. when - 0 the stack grows, etc.) 1 Code 0x00000000 2 • All allocated pages can be Unalloc Unalloc stored in secondary … storage (hard drive) Secondary Used/Unused Blocks in Storage Virtual Address Space
9.11 Physical Address Space (PAS) • Physical memory is broken into 0 - Code 1 - Code page-size blocks called "frames" 0 - Code 2 - Data • 0xffffffff 1 - Code Multiple programs can be running 3 - Stack I/O 2 - Data and 4 - Heap and their pages can share the 3 - Stack un- … physical memory used 4 - Heap area 0 • Physical memory acts as a cache 0 0x3fffffff 1 frame 1 for pages with secondary storage 2 0-Code 2 acting as the backing store (next 3 Pg. 0 3 0 lower level in the hierarchy) Pg. 2 Unalloc 1 … 2-Data • A page can be: 2 Pg. 0 – 0 Unallocated (not needed frame 0x00000000 1 yet…stack/heap) 2 – Allocated and residing in secondary Unalloc 1GB Physical storage ( Uncached ) Unalloc Memory and Secondary – Allocated and residing in main … 32-bit Address Storage memory ( Cached ) Space Fictitious Virtual Address Spaces
9.12 Paging Phys. Addr. Space • Virtual address space is divided into equal 0xffffffff size "pages" (often around 4KB) I/O and • Physical memory is broken into page un- used frames (which can hold any page of virtual area memory and then be swapped for another 0x3fffffff frame page) 0-Code Pg. 0 • Virtual address spaces can be contiguous Pg. 2 while physical layout is not 2-Data Pg. 0 Physical Frame of frame 0x00000000 memory can hold data from any virtual page. Since all pages are the Pg. 0 Pg. 0 same size any page can Pg. 1 Pg. 1 go in any frame (and be Pg. 2 Pg. 2 swapped at our desire). Pg. 3 unused unused unused … … Proc. 1 VAS Proc. 2 VAS
9.13 Virtual vs. Physical Addresses 0 - Code VA: 0x040000 1 - Code VA: 0x100080 2 - Data • Key : Programs are written using virtual 0xffffffff I/O 3 - Stack 0 - Code addresses and 4 - Heap 1 - Code un- • HW & the OS will translate the virtual … 2 - Data used addresses used by the program to the 3 - Stack area 0 4 - Heap physical address where that page resides PA:0x3fffffff frame 1 0 • If an attempt is made to access a page 0-Code PA: 0x21b000 2 1 Pg. 0 that is not in physical memory, HW 3 2 Pg. 2 Unalloc generates a "page fault exception" and 3 2-Data … PA: 0x11f000 0 the OS is invoked to bring in the page to Pg. 0 1 physical memory (possibly evicting 0 2 another page) frame PA: 0x0 1 • 2 Notice: Virtual addresses are not unique Physical Unalloc – Each program/process has VA: 0x00000000 Memory and Unalloc Secondary Address Space … Storage Virtual Physical Translation Unit / Fictitious Virtual Addr Proc. Addr MMU Memory Address Spaces Core (Mem. Mgmt. Unit) Data
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