CS184a: Computer Architecture (Structures and Organization) Day19: - - PDF document

▶
cs184a computer architecture structures and organization
SMART_READER_LITE
LIVE PREVIEW

CS184a: Computer Architecture (Structures and Organization) Day19: - - PDF document

Mar 15, 2023 169 likes •421 views

CS184a: Computer Architecture (Structures and Organization) Day19: November 27, 2000 Specialization Caltech CS184a Fall2000 -- DeHon 1 Previously How to support bit processing operations Generalizing tasks Caltech CS184a Fall2000

slide-1
SLIDE 1

1

Caltech CS184a Fall2000 -- DeHon 1

CS184a: Computer Architecture (Structures and Organization)

Day19: November 27, 2000 Specialization

Caltech CS184a Fall2000 -- DeHon 2

Previously

  • How to support bit processing operations
  • Generalizing tasks
slide-2
SLIDE 2

2

Caltech CS184a Fall2000 -- DeHon 3

Today

  • What bit operations do I need to perform?
  • Specialization

– Binding Time – Specialization Time Models – Specialization Benefits – Expression

Caltech CS184a Fall2000 -- DeHon 4

Quote

  • The fastest instructions you can execute, are

the ones you don’t.

slide-3
SLIDE 3

3

Caltech CS184a Fall2000 -- DeHon 5

Idea

  • Minimize computation
  • Instantaneous computing requirements less

than general case

  • Some data known or predictable

– compute minimum computational residue

  • Dual of generalization we saw for local

control

Caltech CS184a Fall2000 -- DeHon 6

Opportunity Exists

  • Spatial unfolding of computation

– can afford more specificity of operation

  • Fold (early) bound data into problem
  • Common/exceptional cases
slide-4
SLIDE 4

4

Caltech CS184a Fall2000 -- DeHon 7

Opportunity

  • Arises for programmables

– can change their instantaneous implementation – don’t have to cover all cases with a configuration – can be heavily specialized

  • while still capable of solving entire problem

– (all problems, all cases)

Caltech CS184a Fall2000 -- DeHon 8

Opportunity

  • With bit level control

– large space of optimization than word level

  • When branching costly

– more important exploit restricted/simplified cases

  • While true for both spatial and temporal

programmables

– bigger effect/benefits for spatial

slide-5
SLIDE 5

5

Caltech CS184a Fall2000 -- DeHon 9

Multiply Example

Caltech CS184a Fall2000 -- DeHon 10

Multiply Show

  • Specialization in datapath width
  • Specialization in data
slide-6
SLIDE 6

6

Caltech CS184a Fall2000 -- DeHon 11

Typical Optimization

  • Once know another piece of information

about a computation

– data value, parameter, usage limit

  • Fold into computation

– producing smaller computational residue

Caltech CS184a Fall2000 -- DeHon 12

Benefits

Empirical Examples

slide-7
SLIDE 7

7

Caltech CS184a Fall2000 -- DeHon 13

Benefit Examples

  • UART
  • Pattern match
  • Less than
  • Multiply revisited

– more than just constant propagation

  • ATR

Caltech CS184a Fall2000 -- DeHon 14

UART

  • I8251 Intel (PC) standard UART
  • Many operating modes

– bits – parity – sync/async

  • Run in same mode for length of connection
slide-8
SLIDE 8

8

Caltech CS184a Fall2000 -- DeHon 15

UART FSMs

Caltech CS184a Fall2000 -- DeHon 16

UART Composite

slide-9
SLIDE 9

9

Caltech CS184a Fall2000 -- DeHon 17

Pattern Match

  • Savings:

– 2N bit input computation → N – if N variable, maybe trim unneeded – state elements store target – control load target

Caltech CS184a Fall2000 -- DeHon 18

Pattern Match

slide-10
SLIDE 10

10

Caltech CS184a Fall2000 -- DeHon 19

Less Than

  • Area depend on target value
  • But all targets less than generic comparison

Caltech CS184a Fall2000 -- DeHon 20

Multiply (revisited)

  • Specialization can be more than constant

propagation

  • Naïve,

– save product term generation – complexity number of 1’s in constant input

  • Can do better exploiting algebraic

properties

slide-11
SLIDE 11

11

Caltech CS184a Fall2000 -- DeHon 21

Multiply

  • Never really need more than N/2 one bits

in constant

  • If more than N/2 ones:

– invert c (2N+1-1-c) – (less than N/2 ones) – multiply by x (2N+1-1-c)x – add x (2N+1-c)x – subtract from (2N+1)x cx

Caltech CS184a Fall2000 -- DeHon 22

Multiply

  • At most N/2+2 adds for any constant
  • Exploiting common subexpressions can do

better:

– e.g.

  • c=10101010
  • t1=x+x<<2
  • t2=t1<<5+t1<<1
slide-12
SLIDE 12

12

Caltech CS184a Fall2000 -- DeHon 23

Multiply

Caltech CS184a Fall2000 -- DeHon 24

Example: ATR

  • Automatic Target Recognition

– need to score image for a number of different patterns

  • different views of tanks, missles, etc.

– reduce target image to a binary template with don’t cares – need to track many (e.g. 70-100) templates for each image region – templates themselves are sparse

  • small fraction of care pixels
slide-13
SLIDE 13

13

Caltech CS184a Fall2000 -- DeHon 25

Example: ATR

  • 16x16x2=512 flops to

hold single target pattern

  • 16x16=256 LUTs to

compute match

  • 256 score bits→8b

score ~ 500 adder bits in tree

  • more for retiming
  • ~800 LUTs here
  • Maybe fit 1 generic

template in XC4010 (400 CLBs)?

Caltech CS184a Fall2000 -- DeHon 26

Example: UCLA ATR

  • UCLA

– specialize to template – ignore don’t care pixels – only build adder tree to care pixels – exploit common subexpressions

– get 10 templates in a XC4010

slide-14
SLIDE 14

14

Caltech CS184a Fall2000 -- DeHon 27

Example: FIR Filtering

Application metric: TAPs = filter taps multiply accumulate

Yi=w1xi+w2xi+1+...

Caltech CS184a Fall2000 -- DeHon 28

Usage Classes

slide-15
SLIDE 15

15

Caltech CS184a Fall2000 -- DeHon 29

Specialization Usage Classes

  • Known binding time
  • Dynamic binding, persistent use

– apparent – empirical

  • Common case

Caltech CS184a Fall2000 -- DeHon 30

Known Binding Time

  • Sum=0
  • For I=0→N

– Sum+=V[I]

  • For I=0→N

– VN[I]=V[I]/Sum

  • Scale(max,min,V)

– for I=0→V.length

  • tmp=(V[I]-min)
  • Vres[I]=tmp/(max-min)
slide-16
SLIDE 16

16

Caltech CS184a Fall2000 -- DeHon 31

Dynamic Binding Time

  • cexp=0;
  • For I=0→V.length

– if (V[I].exp!=cexp)

  • cexp=V[I].exp;

– Vres[I]=

  • V[I].mant<<cexp
  • Thread 1:

– a=src.read() – if (a.newavg())

  • avg=a.avg()
  • Thread 2:

– v=data.read() – out.write(v/avg)

Caltech CS184a Fall2000 -- DeHon 32

Empirical Binding

  • Have to check if value changed

– Checking value O(N) area [pattern match] – Interesting because computations

  • can be O(2N ) [Day 8]
  • often greater area than pattern match
slide-17
SLIDE 17

17

Caltech CS184a Fall2000 -- DeHon 33

Common/Exceptional Case

  • For I=0→N

– Sum+=V[I] – delta=V[I]-V[I-1] – SumSq+=V[I]*V[I] – …. – if (overflow)

  • ….
  • For IB=0→N/B

– For II= 0→B

  • I=II+IB
  • Sum+=V[I]
  • delta=V[I]-V[I-1]
  • SumSq+=V[I]*V[I]
  • ….

– if (overflow)

  • ….

Caltech CS184a Fall2000 -- DeHon 34

Binding Times

  • Pre-fabrication
  • Application/algorithm selection
  • Compilation
  • Installation
  • Program startup (load time)
  • Instantiation (new ...)
  • Epochs
  • Procedure
  • Loop
slide-18
SLIDE 18

18

Caltech CS184a Fall2000 -- DeHon 35

Exploitation Models

  • Full Specialization
  • Worst-case pre-allocation

– e.g. multiplier worst-case, avg., this case

  • Range specialization

– data width

  • Template / placeholder

Caltech CS184a Fall2000 -- DeHon 36

Opportunity Example

slide-19
SLIDE 19

19

Caltech CS184a Fall2000 -- DeHon 37

Bit Constancy Lattice

  • binding time for bits of variables (storage-

based)

CBD SCBD CSSI SCSSI CESI SCESI CASI SCASI CAPI const

…… Constant between definitions …… + signed …… Constant in some scope invocations …… + signed …… Constant in each scope invocation …… + signed …… Constant across scope invocations …… + signed …… Constant across program invocations …… declared const

[Experiment: Eylon Caspi/UCB]

Caltech CS184a Fall2000 -- DeHon 38

Experiments

  • Applications:

– UCLA MediaBench: adpcm, epic, g721, gsm, jpeg, mesa, mpeg2 (not shown today - ghostscript, pegwit, pgp, rasta) – gzip, versatility, SPECint95 (parts)

  • Compiler optimize --> instrument for

profiling --> run

  • analyze variable usage, ignore heap

– heap-reads typically 0-10% of all bit-reads – 90-10 rule (variables) - ~90% of bit reads in 1- 20% or bits

[Experiment: Eylon Caspi/UCB]

slide-20
SLIDE 20

20

Caltech CS184a Fall2000 -- DeHon 39

Empirical Bit-Reads Classification

Bit-Read Classification - Variables (MediaBench, averaged per program) SCASI 40% CASI 11% SCESI 2% CESI 5% SCSSI 7% CSSI 13% SCBD 7% CBD 15% const 0.3%

const SCASI CASI SCESI CESI SCSSI CSSI SCBD CBD

[Experiment: Eylon Caspi/UCB]

Caltech CS184a Fall2000 -- DeHon 40

Bit-Reads Classification

  • regular across programs

– SCASI, CASI, CBD stddev ~11%

  • nearly no activity in variables declared

const

  • ~65% in constant + signed bits

– trivially exploited

[Experiment: Eylon Caspi/UCB]

slide-21
SLIDE 21

21

Caltech CS184a Fall2000 -- DeHon 41

Constant Bit-Ranges

  • 32b data paths are too wide
  • 55% of all bit-reads are to sign-bits
  • most CASI reads clustered in bit-ranges

(10% of 11%)

  • CASI+SCASI reads (50%) are positioned:

– 2% low-order 8% whole-word constant 39% high-order 1% elsewhere

[Experiment: Eylon Caspi/UCB]

Caltech CS184a Fall2000 -- DeHon 42

Issue Roundup

slide-22
SLIDE 22

22

Caltech CS184a Fall2000 -- DeHon 43

Expressing

  • Generators
  • Instantiation (disallow mutation once created)
  • Special methods (only allow mutation with)
  • Data Flow (binding time apparent)
  • Control Flow

– (explicitly separate common/uncommon case)

  • Empirical discovery

Caltech CS184a Fall2000 -- DeHon 44

Benefits

  • Much of the benefits come from reduced

area

– reduced area

  • room for more spatial operation
  • maybe less interconnect delay
  • Fully exploiting, full specialization

– don’t know how big a block is until see values – dynamic resource scheduling (next quarter?)

slide-23
SLIDE 23

23

Caltech CS184a Fall2000 -- DeHon 45

Optimization Prospects

  • Area-Time Tradeoff

– Tspcl = Tsc+Tload – ATgen = Agen× Tgen – ATspcl = Aspcl× (Tsc+Tload)

  • If compute long enough

– Tsc>>Tload → amortize out load

Caltech CS184a Fall2000 -- DeHon 46

Storage

  • Will have to store configurations

somewhere

  • LUT ~ 1Mλ2
  • Configuration 64+ bits

– SRAM: 80Kλ2 (12-13 for parity) – Dense DRAM: 6.4Kλ2 (160 for parity)

slide-24
SLIDE 24

24

Caltech CS184a Fall2000 -- DeHon 47

Saving Instruction Storage

  • Cache common, rest on alternate media

– e.g. disk

  • Compressed Descriptions
  • Algorithmically composed descriptions

– good for regular datapaths – think Kolmogorov complexity

  • Compute values, fill in template
  • Run-time configuration generation

Caltech CS184a Fall2000 -- DeHon 48

Big Ideas [MSB Ideas]

  • Programmable advantage

– Minimize work by specializing to instantaneous computing requirements

  • Savings depends on functional complexity

– but can be substantial for large blocks – close gap with custom?

  • Several models of structure

– slow changing/early bound data, common case

  • Several models of exploitation

– template, range, bounds, full special