CS 423: Operating Systems Design
Professor Michael Bailey Spring 2018
CS 423 Operating System Design: Process VMs Professor Michael - - PowerPoint PPT Presentation
CS 423 Operating System Design: Process VMs Professor Michael Bailey Spring 2018 CS 423: Operating Systems Design Goals for Today Learning Objective: Conclude discussion of virtualization w/ process VMs Announcements, etc:
CS 423: Operating Systems Design
Professor Michael Bailey Spring 2018
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Reminder: Please put away devices at the start of class
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Edit: The original automata didn’t execute the current block unless there was a hit!
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Guest Process
Runtime
Host OS
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Guest Memory Image Emulation Engine Code Cache Manager Code Cache Exception Emulation OS Call Emulation Initialization Loader
Host OS
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S1 S2 S3 S4
e(S1) e(S2) e(S3)
S1` S2` S3` S4`
e`(S1) e`(S2) e`(S3) V(S1) V(S2) V(S3) V(S4) Host Guest
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à Host application (virtual) address space
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Translation Table Guest Address Space Host (Virtual) Address Space Software translates guest to host virtual addresses. Disadvantage? 64K blocks
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Guest Application Address Space Mapped Guest Application Address Space Runtime Host Virtual Address Space Guest Application Address Space Mapped Guest Application Address Space Runtime Host Virtual Address Space Offset Translation Direct Translation
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Guest Application Address Space Mapped Guest Application Address Space Runtime Host Virtual Address Space Guest Application Address Space Mapped Guest Application Address Space Runtime Host Virtual Address Space Offset Translation Direct Translation
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– A system call to set memory protection (specifies page and access privileges) – A signal for a memory protection violation that can be delivered to the application (runtime)
– Each page has protection bits such as read/write or read/ write/execute (e.g., you cannot execute data, or overwrite code) – What if guest architecture has read/write/execute protection whereas host has read/write only?
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accordingly
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Program size Latency Binary translation Interpretation
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– Traps (caused by instructions in the program) – Hardware interrupts (caused by asynchronous external events)
– Ensure that all instructions prior to trap have been executed – Ensure that none of the instructions after the trap have been executed
– Emulated code must be in interruptible state…
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– Interpretation: When an interrupt occurs, finish interpreting the current instruction and execute the interrupt handler – Binary translation: When an interrupt occurs, the emulated code may be in non-interruptible state (what does that mean?)
interruptible.
boundary is reached, then execute the interrupt handler.
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– Interpretation: When an interrupt occurs, finish interpreting the current instruction and execute the interrupt handler – Binary translation: When an interrupt occurs, the emulated code may be in non-interruptible state (what does that mean?)
interruptible.
boundary is reached, then execute the interrupt handler.
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– Interpretation: When an interrupt occurs, finish interpreting the current instruction and execute the interrupt handler – Binary translation: When an interrupt occurs, the emulated code may be in non-interruptible state (what does that mean?)
interruptible.
boundary is reached, then execute the interrupt handler.
What if blocks are chained?
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– Translate entire functions into equivalent ones – Example: replace a disk I/O system call on the guest with an equivalent disk I/O call on the host
– Example: Calls installing a new signal handler may be handled by the runtime since runtime intercepts all signals and maintains their handlers.