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CS 3410 Computer System Organization and Programming Guest Lecture: I/O Devices Christopher Batten Computer Systems Laboratory School of Electrical and Computer Engineering Cornell University Spring 2012 I/O Device Overview Programmed I/O

SLIDE 1

CS 3410 Computer System Organization and Programming Guest Lecture: I/O Devices

Christopher Batten

Computer Systems Laboratory School of Electrical and Computer Engineering Cornell University Spring 2012

SLIDE 2

I/O Device Overview Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

Agenda I/O Device Examples, Organization, and Drivers Programmed I/O vs. Memory-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Memory Access

CS 3410 I/O Devices – Christopher Batten 2 / 50

SLIDE 3

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

I/O Devices Enable Interacting with Environment

Device Behavior Partner Data Rate (b/sec) Keyboard Input Human 100 Mouse Input Human 3.8K Sound Input Input Machine 3M Voice Output Output Human 264K Sound Output Output Human 8M Laser Printer Output Human 3.2M Graphics Display Output Human 800M–8G Network/LAN Input/Output Machine 100M–10G Network/Wireless LAN Input/Output Machine 11–54M Optical Disk Storage Machine 5–120M Flash Memory Storage Machine 32–200M Magnetic Disk Storage Machine 800M–3G

Adapted from [Patterson’08] CS 3410 I/O Devices – Christopher Batten 3 / 50

SLIDE 4

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

I/O Device Unified Interconnect

Processor Processor Cache Hierarchy Cache Hierarchy DRAM Display Disk Keyboard Network Unified Memory and I/O Interconnect

◮ All devices run at same speed, but

performance requirements vary significantly across I/O devices

◮ Difficult to evolve interconnect due to

legacy compatibility

CS 3410 I/O Devices – Christopher Batten 4 / 50

SLIDE 5

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

I/O Device Controllers

Processor Processor Cache Hierarchy Cache Hierarchy DRAM Display Disk Keyboard Network Unified Memory and I/O Interconnect I/O Controller Memory Controller I/O Controller I/O Controller I/O Controller

◮ Decouple I/O devices from interconnect ◮ Enable smarter I/O interfaces

CS 3410 I/O Devices – Christopher Batten 5 / 50

SLIDE 6

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

I/O Device Hierarchical Interconnect

Processor Processor Cache Hierarchy Cache Hierarchy DRAM Display Disk Keyboard Network I/O Controller Memory Controller I/O Controller I/O Controller I/O Controller High-Performance Interconnect Lower-Performance Legacy Interconnect B r i d g e

◮ Use bridge to separate high-performance

processor, memory, display interconnect from lower-performance interconnect

◮ High-performance interconnect can

evolve more quickly

CS 3410 I/O Devices – Christopher Batten 6 / 50

SLIDE 7

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

Bus vs. Point-to-Point Interconnect

Single-Transaction Bus

1 2

Split-Transaction Bus

1 2 3 4

Hub Point-to-Point

◮ Traditionally use slower wide parallel split-transaction busses

⊲ Simple to implement ⊲ More challenging to scale to long distances and high data rates

◮ More recently use high-speed narrow serial point-to-point channels

⊲ Much higher data-rates, distances, bandwidth density ⊲ More challenging to implement

CS 3410 I/O Devices – Christopher Batten 7 / 50

SLIDE 8

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

Example Interconnects

Dev Per Channel Data Rate Name Use Channel Width (B/sec) Firewire 800 External 63 4 100M USB 2.0 External 127 2 60M Parallel ATA Internal 1 16 133M Serial ATA Internal 1 4 300M PCI 66MHz Internal 1 32–64 533M PCI Express v2.x Internal 1 2–64 16G/dir Hypertransport v3.1 Internal 1 2–64 25G/dir QuickPath (QPI) Internal 1 40 12G/dir

Adapted from [Patterson’08] CS 3410 I/O Devices – Christopher Batten 8 / 50

SLIDE 9

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

Traditional Hierarchical Bus-Based Interconnect

Adapted from [Patterson’08] CS 3410 I/O Devices – Christopher Batten 9 / 50

SLIDE 10

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

A2 A3 A1 A0 B2 B3 B1 B0 D1 D0 D2 D3 C1 C0 C2 C3 FSB 1333 MT/s FSB 1333 MT/s 10.5 GB/s 10.5 GB/s

Dual FSB to MCH

XEON

Channel A 5.3 GB/s Channel B 5.3 GB/s Channel C 5.3 GB/s Channel D 5.3 GB/s

PCI-E x16 - 2 PCI-E x16 - 1 PCI-E x16 - 0

PCI-E x8 PCI-E x8 PCI-E x8

8x SAS HDDs

MCH

Blackford 5000P 2x USB PCI 32-bit 33 MHz PCI-E x4

AST2000

Q62611.1 GP 0608 TAN A2

2x Rear USB 2.0 1x Internal USB 2.0 CD/DVD 2x Front USB 2.0 2x 1GB Ethernet 2 & 3 2x 1GB Ethernet 0 & 1 Serial RJ-45 Management 10/100 Ethernet VGA Video

USB to IDE

USB Hub

IOH ESB-2

USB PCI-E ESI (PCI-E)

PCI-E SAS/RAID Controller

DIMMs DIMMs DIMMs DIMMs

Intel Xeon 5200/5400 Intel Xeon 5200/5400

IDE

Sun Fire X4150 (Sep 2008)

CS 3410 I/O Devices – Christopher Batten 10 / 50

SLIDE 11

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

Sun/Oracle Sun Fire X2270 (Feb 2011)

CS 3410 I/O Devices – Christopher Batten 11 / 50

SLIDE 12

I/O Device Overview •

Programmed I/O vs. Mem-Mapped I/O Polling-Based I/O vs. Interrupt-Based I/O Direct-Mem Access

Sun/Oracle Sun Fire X4170 (Apr 2012)

CS 3410 I/O Devices – Christopher Batten 12 / 50