CS 251 Fall 2019 CS 240 Principles of Programming Languages - - PowerPoint PPT Presentation

cs 251 fall 2019 cs 240 principles of programming
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CS 251 Fall 2019 CS 240 Principles of Programming Languages - - PowerPoint PPT Presentation

CS 251 Fall 2019 CS 240 Principles of Programming Languages Foundations of Computer Systems Ben Wood Arithmetic Logic adders Arithmetic Logic Unit https://cs.wellesley.edu/~cs240/ Arithmetic Logic 1 ex Addition: 1-bit half adder A +


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SLIDE 1

CS 251 Fall 2019 Principles of Programming Languages

Ben Wood

λ

CS 240

Foundations of Computer Systems

https://cs.wellesley.edu/~cs240/

Arithmetic Logic

adders Arithmetic Logic Unit

Arithmetic Logic 1

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SLIDE 2

Addition: 1-bit half adder

Arithmetic Logic 2

ex

A B Sum

Carry out A B Carry

  • ut

Sum 1 1 1 1

+

A B Sum Carry out

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SLIDE 3

Addition: 1-bit full adder

Arithmetic Logic 3

Carry in A B Carry

  • ut

Sum 1 1 1 1 1 1 1 1 1 1 1 1

ex

+

A B Sum Carry in Carry out

A B Sum

Carry in Carry out

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SLIDE 4

Addition: n-bit ripple-carry adder

Arithmetic Logic 4

+

A0 B0 Sum0

Carry in0

+

An-1 Bn-1 Sumn-1

Carry outn-1

+

A1 B1 Sum1

+

A2 B2 Sum2

There are faster, more complicated ways too…

A B Sum

Carry in Carry out

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SLIDE 5

ALU

Processor Components

Arithmetic Logic 5

Registers Memory

Instruction Fetch and Decode

1 3 2 4

A b s t r a c t i

  • n

!

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SLIDE 6

Arithmetic Logic Unit (ALU)

Arithmetic Logic 6

Operand A Operand B Condition Codes

(sign, overflow, carry-out, zero)

Result Operation

Hardware unit for arithmetic and bitwise operations.

words

word

a few bits a few bits

1

ALU

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SLIDE 7

1-bit ALU for bitwise operations

Arithmetic Logic 7

Build an n-bit ALU from n 1-bit ALUs. Each bit i in the result is computed from the corresponding bit i in the two inputs.

MUX

A B

1

Operation Result Op A B Result 1 1 1 1 1 1 1 1 1 1 1 1

ex

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SLIDE 8

1-bit ALU

Arithmetic Logic 8

A B

1 Operation Result 2

2

Carry in

+

Sum Carry out MUX

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SLIDE 9

A0 B0

1

Result0

2

Carry in

+

Sum MUX

An-1 Bn-1

1

Resultn-1

2

+

Sum

Carry out

MUX

A1 B1

1

Result1

2

+

Sum MUX

Operation

… ....

2

+

A0 B0 Sum0

Carry in

+

An-1 Bn-1 Sumn-1

Carry out

+

A1 B1 Sum1

+

A2 B2 Sum2

n-bit ripple carry adder n-bit ALU

Arithmetic Logic 9

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SLIDE 10

ALU conditions

Extra ALU outputs describing properties of result. Zero Flag: 1 if result is 00...0 else 0 Sign Flag: 1 if result is negative else 0 Carry Flag: 1 if carry out else 0 (Signed) Overflow Flag: 1 if signed overflow else 0 Implement these.

Arithmetic Logic 10

A0 B0

1

Result0

2

Carry in

+

Sum

MUX

An-1 Bn-1

1

Resultn-1

2

+

Sum

Carry out

MUX

A1 B1

1

Result1

2

+

Sum

MUX

Operation

… ....

2

ex ex

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SLIDE 11

Add subtraction

Arithmetic Logic 12

1

Result0

2

+

MUX 1

Resultn-1

2

+

Carry out MUX 1

Result1

2

+

MUX

Operation

… ....

B1

1

B0

1

Bn-1

1

....

2 How can we control ALU inputs

  • r add minimal new logic

to compute A-B?

A0 A1 An-1

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SLIDE 12

A NAND B A NOR B A<B A==B

How can we control ALU inputs

  • r add minimal new logic

to compute each?

Arithmetic Logic 13

1

Result0

2

+

MUX 1

Resultn-1

2

+

Carry out MUX 1

Result1

2

+

MUX

Operation

… ....

A1

1

B1

1

A0

1

B0

1

Negate B

An-1

1

Bn-1

1

....

Invert A

....

2

ex

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SLIDE 13

Controlling the ALU

Arithmetic Logic 17

ALU control lines Function 0000 AND 0001 OR 0010 add 0110 subtract 1100 NOR Operand A Operand B Result Control Lines Condition Codes A b s t r a c t i

  • n

!

ALU